blob: e29cd8199b18bfe59e15bfc03c61786b23b490ec [file] [log] [blame]
Sean Rhodese96ade62021-10-18 21:07:20 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <variants.h>
4
5/*
6 * All definitions are taken from a comparison of the output of "inteltool -a"
7 * using the stock BIOS and with coreboot.
8 */
9
10/* Early pad configuration in bootblock */
11const struct pad_config early_gpio_table[] = {
12 /* C20: UART2_RXD */
13 PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
14 /* C21: UART2_TXD */
15 PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
16 /* E22: BRD_ID0 */
17 PAD_CFG_GPO(GPP_E22, 1, PLTRST),
18 /* E23: BRD_ID1 */
19 PAD_CFG_GPO(GPP_E23, 1, PLTRST),
20 /* H6: BRD_ID2 */
21 PAD_CFG_GPI(GPP_H6, NONE, PLTRST),
22 /* H7: BRD_ID3 */
23 PAD_CFG_GPI(GPP_H7, NONE, PLTRST),
24};
25
26const struct pad_config *variant_early_gpio_table(size_t *num)
27{
28 *num = ARRAY_SIZE(early_gpio_table);
29 return early_gpio_table;
30}
31
32/* Pad configuration in ramstage. */
33const struct pad_config gpio_table[] = {
34 /* REFERENCE: EP PER SCHEMATIC */
35
36 /* GPD0: PCH_BATLOW# */
37 PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
38 /* GPD1: AC_PRESENT */
39 PAD_CFG_NF(GPD1, NONE, DEEP, NF1),
40 /* GPD2: LAN_WAKE# */
41 PAD_NC(GPD2, NONE),
42 /* GPD3: SIO_PWRBTN# */
43 PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
44 /* GPD4: SIO_SLP_S3# */
45 PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
46 /* GPD5: SIO_SLP_S4# */
47 PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
48 /* GPD6: SIO_SLP_A# */
49 PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
50 /* GPD7: PCH_TBT_PERST# */
51 PAD_CFG_GPO(GPD7, 0, PLTRST),
52 /* GPD8: SUSCLK */
53 PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
54 /* GPD9: SIO_SLP_WLAN# */
55 PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
56 /* GPD10: SIO_SLP_S5# */
57 PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
58 /* GPD11: PM_LANPHY_EN */
59 PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
60
61 /* A0: KBRST_N */
62 PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
63 /* A1: LPC_AD0 */
64 PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
65 /* A2: LPC_AD1 */
66 PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
67 /* A3: LPC_AD2 */
68 PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
69 /* A4: LPC_AD3 */
70 PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
71 /* A5: LPC_FRAME_N */
72 PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
73 /* A6: LPC_SERIRQ */
74 PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
75 /* A7: Not Connected */
76 PAD_NC(GPP_A7, NONE),
77 /* A8: GPPC_A8_CLKRUN_N */
78 PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
79 /* A9: ESPI_CLK */
80 PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
81 /* A10: Not Connected */
82 PAD_NC(GPP_A10, NONE),
83 /* A11: Not Connected */
84 PAD_NC(GPP_A11, NONE),
85 /* A12: TABLET_MODE_CTRL */
86 PAD_NC(GPP_A12, NONE),
87 /* A13: SUSPWRDNACK */
88 PAD_CFG_GPO(GPP_A13, 1, PLTRST),
89 /* A14: PM_SUS_STAT_N */
90 PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
91 /* A15: SPK_PD_N */
92 PAD_CFG_GPO(GPP_A15, 1, PLTRST),
93 /* A16: Not Connected */
94 PAD_NC(GPP_A16, NONE),
95 /* A17: SAR_DPR_PCH */
96 PAD_NC(GPP_A17, NONE),
97 /* A18: ACCEL1_INT1 */
98 PAD_NC(GPP_A18, UP_20K),
99 /* A19: ACCEL2_INT1 */
100 PAD_NC(GPP_A19, UP_20K),
101 /* A20: HUMAN_PRESENCE_INT_N */
102 PAD_NC(GPP_A20, UP_20K),
103 /* A21: HALL_SENSOR_INT */
104 PAD_NC(GPP_A21, UP_20K),
105 /* A22: SAR_NIRQ_PCH */
106 PAD_NC(GPP_A22, UP_20K),
107 /* A23: INT_SHARED */
108 PAD_NC(GPP_A23, UP_20K),
109
110 /* B0: Not Connected */
111 PAD_NC(GPP_B0, NONE),
112 /* B1: Not Connected */
113 PAD_NC(GPP_B1, NONE),
114 /* B2: Not Connected */
115 PAD_NC(GPP_B2, NONE),
116 /* B3: CLICK_PAD_INT_R_N */
117 PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST),
118 /* B4: BT_RF_KILL_N */
119 PAD_CFG_GPO(GPP_B4, 1, DEEP),
120 /* B5: WLAN_CLKREQ# */
121 PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
122 /* B6: CLKREQ1_SSD_N */
123 PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
124 /* B7: LAN_CLKREQ# */
125 PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
126 /* B8: Not Connected */
127 PAD_NC(GPP_B8, NONE),
128 /* B9: Not Connected */
129 PAD_NC(GPP_B9, NONE),
130 /* B10: Not Connected */
131 PAD_NC(GPP_B10, NONE),
132 /* B11: EXT_PWR_GATE_N */
133 PAD_CFG_GPO(GPP_B11, 1, PLTRST),
134 /* B12: PM_SLP_S0_N */
135 PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
136 /* B13: PLT_RST_N */
137 PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
138 /* B14: TCH_PNL_PWR_EN */
139 PAD_CFG_GPO(GPP_B14, 1, PLTRST),
140 /* B15: Not Connected */
141 PAD_NC(GPP_B15, NONE),
142 /* B16: FPS_INT */
143 PAD_CFG_GPI_APIC(GPP_B16, NONE, PLTRST, LEVEL, NONE),
144 /* B17: FPS_RST_N */
145 PAD_CFG_GPO(GPP_B17, 1, PLTRST),
146 /* B18: AR_CIO_PWR_EN */
147 PAD_CFG_GPO(GPP_B18, 0, DEEP),
148 /* B19: GSPI1_CS0_FPS_N */
149 PAD_NC(GPP_B19, NONE),
150 /* B20: GSPI1_CLK_FPS */
151 PAD_NC(GPP_B20, NONE),
152 /* B21: GSPI1_MISO_FPS */
153 PAD_NC(GPP_B21, NONE),
154 /* B22: GSPI1_MOSI_FPS */
155 PAD_CFG_GPO(GPP_B22, 0, DEEP),
156 /* B23: EC_SLP_S0IX_N */
157 PAD_NC(GPP_B23, NONE),
158
159 /* C0: SMB_CLK */
160 PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
161 /* C1: SMB_DATA */
162 PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
163 /* C2: WIFI_RF_KILL_N */
164 PAD_CFG_GPO(GPP_C2, 1, DEEP),
165 /* C3: Not Connected */
166 PAD_NC(GPP_C3, NONE),
167 /* C4: Not Connected */
168 PAD_NC(GPP_C4, NONE),
169 /* C5: SML0ALERT */
170 PAD_CFG_GPO(GPP_C5, 0, DEEP),
171 /* C6: Not Connected */
172 PAD_NC(GPP_C6, NONE),
173 /* C7: Not Connected */
174 PAD_NC(GPP_C7, NONE),
175 /* C8: CODEC_INT_N */
176 PAD_CFG_GPI_APIC_LOW(GPP_C8, UP_20K, PLTRST),
177 /* C9: Not Connected */
178 PAD_NC(GPP_C9, NONE),
179 /* C10: Not Connected */
180 PAD_NC(GPP_C10, NONE),
181 /* C11: Not Connected */
182 PAD_NC(GPP_C11, NONE),
183 /* C12: PCIE_NAND_RST_R_N */
184 PAD_CFG_GPO(GPP_C12, 1, PLTRST),
185 /* C13: M2_SSD_PWREN */
186 PAD_NC(GPP_C13, NONE),
187 /* C14: TBT_WAKE_MUX_SEL_N */
188 PAD_NC(GPP_C14, NONE),
189 /* C15: TBT_RST_N */
190 PAD_NC(GPP_C15, NONE),
191 /* C16: I2C0_SDA */
192 PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
193 /* C17: I2C0_SCL */
194 PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
195 /* C18: TOUCH_I2C_SDA */
196 PAD_NC(GPP_C18, NONE),
197 /* C19: TOUCH_I2C_SDL */
198 PAD_NC(GPP_C19, NONE),
199 /* C22: AR1_USB_PWR_EN */
200 PAD_NC(GPP_C22, NONE),
201 /* C23: Not Connected */
202 PAD_NC(GPP_C23, NONE),
203
204 /* D0: TPM_IRQ */
205 PAD_NC(GPP_D0, NONE),
206 /* D1: Not Connected */
207 PAD_NC(GPP_D1, NONE),
208 /* D2: Not Connected */
209 PAD_NC(GPP_D2, NONE),
210 /* D3: Not Connected */
211 PAD_NC(GPP_D3, NONE),
212 /* D4: Not Connected */
213 PAD_NC(GPP_D4, NONE),
214 /* D5: Not Connected */
215 PAD_NC(GPP_D5, NONE),
216 /* D6: Not Connected */
217 PAD_NC(GPP_D6, NONE),
218 /* D7: ISH_I2C1_SDA */
219 PAD_NC(GPP_D7, NONE),
220 /* D8: ISH_I2C1_SDL */
221 PAD_NC(GPP_D8, NONE),
222 /* D9: TCH_PNL2_RST_R_N */
223 PAD_CFG_GPO(GPP_D9, 1, PLTRST),
224 /* D10: TCH_PNL2_INT_R_N */
225 PAD_NC(GPP_D10, NATIVE),
226 /* D11: Not Connected */
227 PAD_NC(GPP_D11, NATIVE),
228 /* D12: GPPC_D_12 */
229 PAD_CFG_GPO(GPP_D12, 0, DEEP),
230 /* D13: WWAN_FCP_OFF_N */
231 PAD_NC(GPP_D13, NONE),
232 /* D14: TCH_PNL1_RST_N */
233 PAD_CFG_GPO(GPP_D14, 1, PLTRST),
234 /* D15: Not Connected */
235 PAD_NC(GPP_D15, NONE),
236 /* D16: GPIO_2_EC */
237 PAD_CFG_GPO(GPP_D16, 0, PWROK),
238 /* D17: DMIC_CLK1_SNDW3_CLK */
239 PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
240 /* D18: DMIC_DATA1_SNDW3_DATA */
241 PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
242 /* D19: DMIC_CLK_0 */
243 PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
244 /* D20: DMIC_DATA_0 */
245 PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
246 /* D21: Not Connected */
247 PAD_NC(GPP_D21, NONE),
248 /* D22: TPM_RST */
249 PAD_NC(GPP_D22, NONE),
250 /* D23: TPM_IRQ */
251 PAD_NC(GPP_D23, NONE),
252
253 /* E0: Not Connected */
254 PAD_NC(GPP_E0, NONE),
255 /* E1: GPPC_E1_SATAXPCIE_1_SATAGP_1 */
256 PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
257 /* E2: Not Connected */
258 PAD_NC(GPP_E2, NONE),
259 /* E3: Not Connected */
260 PAD_NC(GPP_E3, NONE),
261 /* E4: Not Connected */
262 PAD_NC(GPP_E4, NONE),
263 /* E5: GPPC_E5_SATA_DEVSLP_1 */
264 PAD_NC(GPP_E5, NONE),
265 /* E6: Not Connected */
266 PAD_NC(GPP_E6, NONE),
267 /* E7: Not Connected */
268 PAD_CFG_GPI(GPP_E7, NONE, PLTRST),
269 /* E8: Not Connected */
270 PAD_NC(GPP_E8, NONE),
271 /* E9: GPPC_E9_USB2_OCB_0 */
272 PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
273 /* E10: GPPC_E10_USB2_OCB_1 */
274 PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
275 /* E11: USB2_P3_WP2_OC_N */
276 PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
277 /* E12: GPPC_E12_USB2_OCB_3 */
278 PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1),
279 /* E13: DDI1_HPD */
280 PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
281 /* E14: DDI2_HPD */
282 PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
283 /* E15: SMC_SMI_N */
284 PAD_CFG_GPI_SMI_LOW(GPP_E15, NONE, DEEP, EDGE_SINGLE),
285 /* E16: SMC_SCI_N */
286 PAD_CFG_GPI_SCI_LOW(GPP_E16, NONE, PLTRST, LEVEL),
287 /* E17: EDP_HPD */
288 PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
289 /* E18: DDI1_DDC_SCL */
290 PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
291 /* E19: DDI1_DDC_SDA */
292 PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
293 /* E20: DDI2_CTRL_CLK */
294 PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
295 /* E21: DDI2_CTRL_DATA */
296 PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
297
298 /* F0: Not Connected */
299 PAD_NC(GPP_F0, NONE),
300 /* F1: Not Connected */
301 PAD_NC(GPP_F1, NONE),
302 /* F2: Not Connected */
303 PAD_NC(GPP_F2, NONE),
304 /* F3: Not Connected */
305 PAD_NC(GPP_F3, NONE),
306 /* F4: CNV_BRI_DT_R */
307 PAD_CFG_NF(GPP_F4, UP_20K, DEEP, NF1),
308 /* F5: CNV_BRI_RSP */
309 PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
310 /* F6: CNV_RGI_DT_R */
311 PAD_CFG_NF(GPP_F6, UP_20K, DEEP, NF1),
312 /* F7: CNV_RGI_RSP */
313 PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
314 /* F8: Not Connected */
315 PAD_NC(GPP_F8, NONE),
316 /* F9: Not Connected */
317 PAD_NC(GPP_F9, NONE),
318 /* F10: Not Connected */
319 PAD_NC(GPP_F10, NONE),
320 /* F11: EMMC_CMD */
321 PAD_NC(GPP_F11, NONE),
322 /* F12: EMMC_DATA_0 */
323 PAD_NC(GPP_F12, NONE),
324 /* F13: EMMC_DATA_1 */
325 PAD_NC(GPP_F13, NONE),
326 /* F14: EMMC_DATA_2 */
327 PAD_NC(GPP_F14, NONE),
328 /* F15: EMMC_DATA_3 */
329 PAD_NC(GPP_F15, NONE),
330 /* F16: EMMC_DATA_4 */
331 PAD_NC(GPP_F16, NONE),
332 /* F17: EMMC_DATA_5 */
333 PAD_NC(GPP_F17, NONE),
334 /* F18: EMMC_DATA_6 */
335 PAD_NC(GPP_F18, NONE),
336 /* F19: EMMC_DATA_7 */
337 PAD_NC(GPP_F19, NONE),
338 /* F20: EMMC_STROBE */
339 PAD_NC(GPP_F20, NONE),
340 /* F21: EMMC_CLK */
341 PAD_NC(GPP_F21, NONE),
342 /* F22: EMMC_RESETB */
343 PAD_NC(GPP_F22, NONE),
344 /* F23: A4WP_PRESENT */
345 PAD_CFG_NF(GPP_F23, DN_20K, DEEP, NF1),
346
347 /* G0: Not Connected */
348 PAD_NC(GPP_G0, NONE),
349 /* G1: Not Connected */
350 PAD_NC(GPP_G1, NONE),
351 /* G2: Not Connected */
352 PAD_NC(GPP_G2, NONE),
353 /* G3: Not Connected */
354 PAD_NC(GPP_G3, NONE),
355 /* G4: Not Connected */
356 PAD_NC(GPP_G4, NONE),
357 /* G5: Not Connected */
358 PAD_NC(GPP_G5, UP_20K),
359 /* G6: Not Connected */
360 PAD_NC(GPP_G6, NONE),
361 /* G7: Not Connected */
362 PAD_NC(GPP_G7, DN_20K),
363
364 /* H0: Not Connected */
365 PAD_NC(GPP_H0, NONE),
366 /* H1: GPPC_H1_SSP2_SFRM */
367 PAD_CFG_NF(GPP_H1, UP_20K, DEEP, NF3),
368 /* H2: GPPC_H2_SSP2_TXD */
369 PAD_CFG_NF(GPP_H2, UP_20K, DEEP, NF3),
370 /* H3: Not Connected */
371 PAD_NC(GPP_H3, UP_20K),
372 /* H4: GSENSOR_I2C_SDA */
373 PAD_NC(GPP_H4, NONE),
374 /* H5: GSENSOR_I2C_SCL */
375 PAD_NC(GPP_H5, NONE),
376 /* H8: Not Connected */
377 PAD_NC(GPP_H8, NONE),
378 /* H9: Not Connected */
379 PAD_NC(GPP_H9, NONE),
380 /* H10: ISH_I2C2_SDA */
381 PAD_CFG_GPO(GPP_H10, 1, PLTRST),
382 /* H11: ISH_I2C2_SCL */
383 PAD_CFG_GPO(GPP_H11, 1, PLTRST),
384 /* H12: Not Connected */
385 PAD_NC(GPP_H12, NONE),
386 /* H13: Not Connected */
387 PAD_NC(GPP_H13, NONE),
388 /* H14: Not Connected */
389 PAD_NC(GPP_H14, NONE),
390 /* H15: Not Connected */
391 PAD_NC(GPP_H15, NONE),
392 /* H16: Not Connected */
393 PAD_NC(GPP_H16, NONE),
394 /* H17: GPPC_H_17_WWAN_DISABLE_N */
395 PAD_CFG_GPO(GPP_H17, 0, DEEP),
396 /* H18: GPPC_H_18_CPU_C10 */
397 PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
398 /* H19: Not Connected */
399 PAD_NC(GPP_H19, NONE),
400 /* H20: Not Connected */
401 PAD_NC(GPP_H20, NONE),
402 /* H21: GPPC_H21 */
403 PAD_CFG_GPO(GPP_H21, 0, DEEP),
404 /* H22: Not Connected */
405 PAD_NC(GPP_H22, NONE),
406 /* H23: GPPC_H23 */
407 PAD_CFG_GPO(GPP_H23, 0, DEEP),
408};
409
410const struct pad_config *variant_gpio_table(size_t *num)
411{
412 *num = ARRAY_SIZE(gpio_table);
413 return gpio_table;
414}