| Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Sage Electronic Engineering, LLC |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <device/device.h> |
| 21 | #include <delay.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <device/pci_ids.h> |
| 24 | #include <device/pci_ops.h> |
| 25 | #include <arch/io.h> |
| 26 | #include "hudson.h" |
| 27 | |
| 28 | static void sd_init(struct device *dev) |
| 29 | { |
| 30 | u32 stepping; |
| 31 | |
| 32 | stepping = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xFC); |
| 33 | |
| 34 | struct southbridge_amd_pi_avalon_config *sd_chip = |
| 35 | (struct southbridge_amd_pi_avalon_config *)(dev->chip_info); |
| 36 | |
| 37 | if (sd_chip->sd_mode == 3) { /* SD 3.0 mode */ |
| 38 | pci_write_config32(dev, 0xA4, 0x31FEC8B2); |
| 39 | pci_write_config32(dev, 0xA8, 0x00002503); |
| 40 | pci_write_config32(dev, 0xB0, 0x02180C19); |
| 41 | pci_write_config32(dev, 0xD0, 0x0000078B); |
| 42 | } |
| 43 | else { /* SD 2.0 mode */ |
| 44 | if ((stepping & 0x0000000F) == 0) { /* Stepping A0 */ |
| 45 | pci_write_config32(dev, 0xA4, 0x31DE32B2); |
| 46 | pci_write_config32(dev, 0xB0, 0x01180C19); |
| 47 | pci_write_config32(dev, 0xD0, 0x0000058B); |
| 48 | } |
| 49 | else { /* Stepping >= A1 */ |
| 50 | pci_write_config32(dev, 0xA4, 0x31FE3FB2); |
| 51 | pci_write_config32(dev, 0xB0, 0x01180C19); |
| 52 | pci_write_config32(dev, 0xD0, 0x0000078B); |
| 53 | } |
| 54 | } |
| 55 | } |
| 56 | |
| 57 | static struct device_operations sd_ops = { |
| 58 | .read_resources = pci_dev_read_resources, |
| 59 | .set_resources = pci_dev_set_resources, |
| 60 | .enable_resources = pci_dev_enable_resources, |
| 61 | .init = sd_init, |
| 62 | .scan_bus = 0, |
| 63 | }; |
| 64 | |
| 65 | static const struct pci_driver sd_driver __pci_driver = { |
| 66 | .ops = &sd_ops, |
| 67 | .vendor = PCI_VENDOR_ID_AMD, |
| 68 | .device = PCI_DEVICE_ID_AMD_YANGTZE_SD, |
| 69 | }; |