| Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2014 Sage Electronic Engineering, LLC. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | #include <console/console.h> |
| 22 | #include <device/device.h> |
| 23 | #include <device/pci.h> |
| 24 | #include <device/pci_ids.h> |
| 25 | #include <device/pci_ops.h> |
| 26 | #include "hudson.h" |
| 27 | #include <southbridge/amd/amd_pci_util.h> |
| 28 | #include <bootstate.h> |
| 29 | |
| 30 | static void pci_init(struct device *dev) |
| 31 | { |
| 32 | } |
| 33 | |
| 34 | /* |
| 35 | * Update the PCI devices with a valid IRQ number |
| 36 | * that is set in the mainboard PCI_IRQ structures. |
| 37 | */ |
| 38 | static void set_pci_irqs(void *unused) |
| 39 | { |
| 40 | /* Write PCI_INTR regs 0xC00/0xC01 */ |
| 41 | write_pci_int_table(); |
| 42 | |
| 43 | /* Write IRQs for all devicetree enabled devices */ |
| 44 | write_pci_cfg_irqs(); |
| 45 | } |
| 46 | |
| 47 | /* |
| 48 | * Hook this function into the PCI state machine |
| 49 | * on entry into BS_DEV_ENABLE. |
| 50 | */ |
| 51 | BOOT_STATE_INIT_ENTRIES(pci_irq_update) = { |
| 52 | BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, |
| 53 | set_pci_irqs, NULL), |
| 54 | }; |
| 55 | |
| 56 | static struct pci_operations lops_pci = { |
| 57 | .set_subsystem = 0, |
| 58 | }; |
| 59 | |
| 60 | static struct device_operations pci_ops = { |
| 61 | .read_resources = pci_bus_read_resources, |
| 62 | .set_resources = pci_dev_set_resources, |
| 63 | .enable_resources = pci_bus_enable_resources, |
| 64 | .init = pci_init, |
| 65 | .scan_bus = pci_scan_bridge, |
| 66 | .reset_bus = pci_bus_reset, |
| 67 | .ops_pci = &lops_pci, |
| 68 | }; |
| 69 | |
| 70 | static const struct pci_driver pci_driver __pci_driver = { |
| 71 | .ops = &pci_ops, |
| 72 | .vendor = PCI_VENDOR_ID_AMD, |
| 73 | .device = PCI_DEVICE_ID_ATI_SB900_PCI, |
| 74 | }; |