blob: 33fafd3b26690645f5a6fcdbcde8dcdbc022d045 [file] [log] [blame]
Patrick Georgie72a8a32012-11-06 11:05:09 +01001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 secunet Security Networks AG
5 * (Written by Nico Huber <nico.huber@secunet.com> for secunet)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
10 * the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <arch/io.h>
23#include <device/device.h>
24#include <device/pci.h>
25#include <device/pci_ids.h>
26
27#include "i82801ix.h"
28
29static void thermal_init(struct device *dev)
30{
31 if (LPC_IS_MOBILE(dev_find_slot(0, PCI_DEVFN(0x1f, 0))))
32 return;
33
34 u8 reg8;
35 u32 reg32;
36
37 pci_write_config32(dev, 0x10, DEFAULT_TBAR);
38 reg32 = pci_read_config32(dev, 0x04);
39 pci_write_config32(dev, 0x04, reg32 | (1 << 1));
40
41 write32(DEFAULT_TBAR + 0x04, 0); /* Clear thermal trip points. */
42 write32(DEFAULT_TBAR + 0x44, 0);
43
44 write8(DEFAULT_TBAR + 0x01, 0xba); /* Enable sensor 0 + 1. */
45 write8(DEFAULT_TBAR + 0x41, 0xba);
46
47 reg8 = read8(DEFAULT_TBAR + 0x08); /* Lock thermal registers. */
48 write8(DEFAULT_TBAR + 0x08, reg8 | (1 << 7));
49 reg8 = read8(DEFAULT_TBAR + 0x48);
50 write8(DEFAULT_TBAR + 0x48, reg8 | (1 << 7));
51
52 reg32 = pci_read_config32(dev, 0x04);
53 pci_write_config32(dev, 0x04, reg32 & ~(1 << 1));
54 pci_write_config32(dev, 0x10, 0);
55}
56
57static void thermal_set_subsystem(device_t dev, unsigned vendor, unsigned device)
58{
59 if (!vendor || !device) {
60 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
61 pci_read_config32(dev, PCI_VENDOR_ID));
62 } else {
63 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
64 ((device & 0xffff) << 16) | (vendor & 0xffff));
65 }
66}
67
68static struct pci_operations thermal_pci_ops = {
69 .set_subsystem = thermal_set_subsystem,
70};
71
72static struct device_operations device_ops = {
73 .read_resources = pci_dev_read_resources,
74 .set_resources = pci_dev_set_resources,
75 .enable_resources = pci_dev_enable_resources,
76 .init = thermal_init,
77 .scan_bus = 0,
78 .ops_pci = &thermal_pci_ops,
79};
80
81static const struct pci_driver ich9_thermal __pci_driver = {
82 .ops = &device_ops,
83 .vendor = PCI_VENDOR_ID_INTEL,
84 .device = 0x2932,
85};