blob: 99dd409d0450ed7e85f3af006aa9ef4ce9ce5ece [file] [log] [blame]
Stefan Reinauer8e073822012-04-04 00:07:22 +02001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2010 Google Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Stefan Reinauer8e073822012-04-04 00:07:22 +020018##
19
Stefan Reinauer5b635792012-08-16 14:05:42 -070020# Run an intermediate step when producing coreboot.rom
21# that adds additional components to the final firmware
22# image outside of CBFS
23INTERMEDIATE+=bd82x6x_add_me
24
Patrick Georgi23f38cd2012-11-16 14:50:32 +010025ramstage-y += pch.c
26ramstage-y += azalia.c
27ramstage-y += lpc.c
28ramstage-y += pci.c
29ramstage-y += pcie.c
30ramstage-y += sata.c
31ramstage-y += usb_ehci.c
32ramstage-y += me.c
33ramstage-y += me_8.x.c
34ramstage-y += smbus.c
Stefan Reinauer8e073822012-04-04 00:07:22 +020035
36ramstage-y += me_status.c
37ramstage-y += reset.c
38ramstage-y += watchdog.c
39
Duncan Laurie800e9502012-06-23 17:06:47 -070040ramstage-$(CONFIG_ELOG) += elog.c
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -070041ramstage-y += spi.c
Duncan Laurie181bbdd2012-06-23 16:53:57 -070042smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -070043
Stefan Reinauer8e073822012-04-04 00:07:22 +020044ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
Stefan Reinauer998f3a22012-06-11 15:15:46 -070045smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c
Stefan Reinauer8e073822012-04-04 00:07:22 +020046
47romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c
48romstage-$(CONFIG_USBDEBUG) += usb_debug.c
Sven Schnelle41419932012-07-28 08:52:44 +020049ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
50smm-$(CONFIG_USBDEBUG) += usb_debug.c
Stefan Reinauer8e073822012-04-04 00:07:22 +020051romstage-y += reset.c
Duncan Lauried4bc0672012-10-11 13:04:14 -070052romstage-y += early_spi.c
Stefan Reinauer8e073822012-04-04 00:07:22 +020053
Stefan Reinauer5b635792012-08-16 14:05:42 -070054bd82x6x_add_me: $(obj)/coreboot.pre $(IFDTOOL)
55 printf " DD Adding Intel Firmware Descriptor\n"
56 dd if=3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin \
57 of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
58 printf " IFDTOOL me.bin -> coreboot.pre\n"
59 $(objutil)/ifdtool/ifdtool \
60 -i ME:3rdparty/mainboard/$(MAINBOARDDIR)/me.bin \
61 $(obj)/coreboot.pre
62 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
Stefan Reinauer7004b7c2012-10-31 17:30:13 -070063ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
64 printf " IFDTOOL Locking Management Engine\n"
65 $(objutil)/ifdtool/ifdtool -l $(obj)/coreboot.pre
66 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
67else
68 printf " IFDTOOL Unlocking Management Engine\n"
69 $(objutil)/ifdtool/ifdtool -u $(obj)/coreboot.pre
70 mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
71endif
Stefan Reinauer5b635792012-08-16 14:05:42 -070072
73PHONY += bd82x6x_add_me