Aaron Durbin | e6af4be | 2015-09-24 12:26:31 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc. |
| 18 | */ |
| 19 | |
| 20 | #include <console/console.h> |
| 21 | #include <ec/google/chromeec/ec.h> |
| 22 | #include <fsp/car.h> |
| 23 | #include <soc/intel/common/util.h> |
| 24 | #include <timestamp.h> |
| 25 | |
| 26 | asmlinkage void *cache_as_ram_main(struct cache_as_ram_params *car_params) |
| 27 | { |
| 28 | /* Initialize timestamp book keeping only once. */ |
| 29 | timestamp_init(car_params->tsc); |
| 30 | |
| 31 | /* Call into pre-console init code then initialize console. */ |
| 32 | car_soc_pre_console_init(); |
| 33 | car_mainboard_pre_console_init(); |
| 34 | console_init(); |
| 35 | |
| 36 | printk(BIOS_DEBUG, "FSP TempRamInit successful\n"); |
| 37 | |
| 38 | printk(BIOS_SPEW, "bist: 0x%08x\n", car_params->bist); |
| 39 | printk(BIOS_SPEW, "tsc: 0x%016llx\n", car_params->tsc); |
| 40 | |
| 41 | if (car_params->bootloader_car_start != CONFIG_DCACHE_RAM_BASE || |
| 42 | car_params->bootloader_car_end != |
| 43 | (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)) { |
| 44 | printk(BIOS_INFO, "CAR mismatch: %08x--%08x vs %08lx--%08lx\n", |
| 45 | CONFIG_DCACHE_RAM_BASE, |
| 46 | CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE, |
| 47 | (long)car_params->bootloader_car_start, |
| 48 | (long)car_params->bootloader_car_end); |
| 49 | } |
| 50 | |
| 51 | car_soc_post_console_init(); |
| 52 | car_mainboard_post_console_init(); |
| 53 | |
| 54 | /* Ensure the EC is in the right mode for recovery */ |
| 55 | if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) |
| 56 | google_chromeec_early_init(); |
| 57 | |
| 58 | /* Return new stack value in ram back to assembly stub. */ |
| 59 | return cache_as_ram_stage_main(car_params->fih); |
| 60 | } |
| 61 | |
| 62 | asmlinkage void after_cache_as_ram(void *chipset_context) |
| 63 | { |
| 64 | timestamp_add_now(TS_FSP_TEMP_RAM_EXIT_END); |
| 65 | printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n"); |
| 66 | soc_display_mtrrs(); |
| 67 | |
| 68 | after_cache_as_ram_stage(); |
| 69 | } |
| 70 | |
| 71 | void __attribute__((weak)) car_mainboard_pre_console_init(void) |
| 72 | { |
| 73 | } |
| 74 | |
| 75 | void __attribute__((weak)) car_soc_pre_console_init(void) |
| 76 | { |
| 77 | } |
| 78 | |
| 79 | void __attribute__((weak)) car_mainboard_post_console_init(void) |
| 80 | { |
| 81 | } |
| 82 | |
| 83 | void __attribute__((weak)) car_soc_post_console_init(void) |
| 84 | { |
| 85 | } |