Felix Held | 3f3eca9 | 2020-01-23 17:12:32 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* This file is part of the coreboot project. */ |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 3 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 4 | #include <device/device.h> |
| 5 | #include <device/pnp.h> |
| 6 | #include <superio/conf_mode.h> |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 7 | #include <pc80/keyboard.h> |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 8 | #include <superio/common/ssdt.h> |
| 9 | #include <arch/acpi.h> |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 10 | #include "ast2400.h" |
Patrick Rudolph | a4e9395 | 2019-12-10 14:53:00 +0100 | [diff] [blame] | 11 | #include "chip.h" |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 12 | |
| 13 | static void ast2400_init(struct device *dev) |
| 14 | { |
Patrick Rudolph | a4e9395 | 2019-12-10 14:53:00 +0100 | [diff] [blame] | 15 | struct superio_aspeed_ast2400_config *conf = dev->chip_info; |
| 16 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 17 | if (!dev->enabled) |
| 18 | return; |
| 19 | |
Patrick Rudolph | a4e9395 | 2019-12-10 14:53:00 +0100 | [diff] [blame] | 20 | if (conf && conf->use_espi) { |
| 21 | pnp_enter_conf_mode(dev); |
| 22 | pnp_set_logical_device(dev); |
| 23 | /* In ESPI mode must write 0 to IRQ level on every LDN */ |
Christian Walter | da60958 | 2020-01-25 13:42:53 +0100 | [diff] [blame] | 24 | pnp_write_config(dev, 0x71, 0); |
Patrick Rudolph | a4e9395 | 2019-12-10 14:53:00 +0100 | [diff] [blame] | 25 | pnp_exit_conf_mode(dev); |
| 26 | } |
| 27 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 28 | switch (dev->path.pnp.device) { |
| 29 | case AST2400_KBC: |
| 30 | pc_keyboard_init(NO_AUX_DEVICE); |
| 31 | break; |
| 32 | } |
| 33 | } |
| 34 | |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 35 | #if CONFIG(HAVE_ACPI_TABLES) |
| 36 | /* Provide ACPI HIDs for generic Super I/O SSDT */ |
| 37 | static const char *ast2400_acpi_hid(const struct device *dev) |
| 38 | { |
| 39 | /* Sanity checks */ |
| 40 | if (dev->path.type != DEVICE_PATH_PNP) |
| 41 | return NULL; |
| 42 | if (dev->path.pnp.port == 0) |
| 43 | return NULL; |
| 44 | if ((dev->path.pnp.device & 0xff) > AST2400_MAILBOX) |
| 45 | return NULL; |
| 46 | |
| 47 | switch (dev->path.pnp.device & 0xff) { |
Elyes HAOUAS | 9a669b1 | 2019-12-05 09:14:30 +0100 | [diff] [blame] | 48 | case AST2400_SUART1: /* fallthrough */ |
| 49 | case AST2400_SUART2: /* fallthrough */ |
| 50 | case AST2400_SUART3: /* fallthrough */ |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 51 | case AST2400_SUART4: |
| 52 | return ACPI_HID_COM; |
| 53 | case AST2400_KBC: |
| 54 | return ACPI_HID_KEYBOARD; |
| 55 | default: |
| 56 | return ACPI_HID_PNP; |
| 57 | } |
| 58 | } |
| 59 | #endif |
| 60 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 61 | static struct device_operations ops = { |
| 62 | .read_resources = pnp_read_resources, |
| 63 | .set_resources = pnp_set_resources, |
| 64 | .enable_resources = pnp_enable_resources, |
| 65 | .enable = pnp_enable, |
| 66 | .init = ast2400_init, |
| 67 | .ops_pnp_mode = &pnp_conf_mode_a5a5_aa, |
Christian Walter | a8a9fb0 | 2019-06-06 15:09:49 +0200 | [diff] [blame] | 68 | #if CONFIG(HAVE_ACPI_TABLES) |
| 69 | .acpi_fill_ssdt_generator = superio_common_fill_ssdt_generator, |
| 70 | .acpi_name = superio_common_ldn_acpi_name, |
| 71 | .acpi_hid = ast2400_acpi_hid, |
| 72 | #endif |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | static struct pnp_info pnp_dev_info[] = { |
| 76 | { NULL, AST2400_SUART1, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 77 | { NULL, AST2400_SUART2, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 78 | { NULL, AST2400_SWAK, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 |
| 79 | | PNP_IRQ0, 0xfff8, 0xfff8, 0xfff8, 0xfff8, }, |
| 80 | { NULL, AST2400_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 |
| 81 | | PNP_MSC0, 0xffff, 0xffff, }, |
| 82 | { NULL, AST2400_GPIO, PNP_IRQ0, }, // GPIO LDN has no IO Region |
| 83 | { NULL, AST2400_SUART3, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 84 | { NULL, AST2400_SUART4, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, |
| 85 | { NULL, AST2400_ILPC2AHB, PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC2 |
| 86 | | PNP_MSC3 | PNP_MSC4 | PNP_MSC5 | PNP_MSC6 | PNP_MSC7 |
| 87 | | PNP_MSC8 | PNP_MSC9 | PNP_MSCA | PNP_MSCB | PNP_MSCC |
| 88 | | PNP_MSCD | PNP_MSCE, }, |
| 89 | { NULL, AST2400_MAILBOX, PNP_IO0 | PNP_IRQ0, 0xfffe, }, |
| 90 | }; |
| 91 | |
| 92 | static void enable_dev(struct device *dev) |
| 93 | { |
Patrick Rudolph | a4e9395 | 2019-12-10 14:53:00 +0100 | [diff] [blame] | 94 | struct superio_aspeed_ast2400_config *conf = dev->chip_info; |
| 95 | |
| 96 | if (conf && conf->use_espi) { |
| 97 | /* UART3 and UART4 are not usable in ESPI mode */ |
| 98 | for (size_t i = 0; i < ARRAY_SIZE(pnp_dev_info); i++) { |
| 99 | if ((pnp_dev_info[i].function == AST2400_SUART3) || |
| 100 | (pnp_dev_info[i].function == AST2400_SUART4)) |
| 101 | pnp_dev_info[i].function = PNP_SKIP_FUNCTION; |
| 102 | } |
| 103 | } |
| 104 | |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 105 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), |
| 106 | pnp_dev_info); |
| 107 | } |
| 108 | |
| 109 | struct chip_operations superio_aspeed_ast2400_ops = { |
Patrick Rudolph | a4e9395 | 2019-12-10 14:53:00 +0100 | [diff] [blame] | 110 | CHIP_NAME("ASpeed AST2400/AST2500 Super I/O") |
Frans Hendriks | 2e1fea4 | 2018-11-26 10:33:00 +0100 | [diff] [blame] | 111 | .enable_dev = enable_dev, |
| 112 | }; |