Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include <acpi/acpi_device.h> |
| 4 | #include <baseboard/variants.h> |
| 5 | #include <console/console.h> |
| 6 | #include <device/pci_ids.h> |
| 7 | #include <device/pci_ops.h> |
Subrata Banik | 06a8922 | 2021-09-09 21:58:48 +0530 | [diff] [blame] | 8 | #include <soc/gpio_soc_defs.h> |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 9 | #include <soc/pci_devs.h> |
Subrata Banik | 06a8922 | 2021-09-09 21:58:48 +0530 | [diff] [blame] | 10 | #include <soc/soc_chip.h> |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 11 | #include <drivers/intel/dptf/chip.h> |
Subrata Banik | 06a8922 | 2021-09-09 21:58:48 +0530 | [diff] [blame] | 12 | #include "board_id.h" |
Sumeet Pawnikar | e06e43a | 2021-09-30 09:38:49 +0530 | [diff] [blame] | 13 | #include <intelblocks/power_limit.h> |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 14 | |
| 15 | const struct cpu_power_limits limits[] = { |
Sumeet Pawnikar | e415df9 | 2021-09-30 09:51:42 +0530 | [diff] [blame^] | 16 | /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, PL4 */ |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 17 | /* PL2 values are for performance configuration */ |
Sumeet Pawnikar | e415df9 | 2021-09-30 09:51:42 +0530 | [diff] [blame^] | 18 | { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 55000, 55000, 123000 }, |
| 19 | { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 55000, 55000, 123000 }, |
| 20 | { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 64000, 64000, 140000 }, |
| 21 | { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 64000, 64000, 140000 }, |
| 22 | { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 115000, 115000, 215000 }, |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 23 | }; |
| 24 | |
Furquan Shaikh | 4f5e8e0 | 2021-09-22 23:38:17 -0700 | [diff] [blame] | 25 | WEAK_DEV_PTR(dptf_policy); |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 26 | void variant_update_power_limits(void) |
| 27 | { |
Furquan Shaikh | 4f5e8e0 | 2021-09-22 23:38:17 -0700 | [diff] [blame] | 28 | const struct device *policy_dev = DEV_PTR(dptf_policy); |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 29 | if (!policy_dev) |
| 30 | return; |
| 31 | |
Furquan Shaikh | 4f5e8e0 | 2021-09-22 23:38:17 -0700 | [diff] [blame] | 32 | struct drivers_intel_dptf_config *config = config_of(policy_dev); |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 33 | |
| 34 | uint16_t mchid = pci_s_read_config16(PCI_DEV(0, 0, 0), PCI_DEVICE_ID); |
| 35 | |
Sumeet Pawnikar | e06e43a | 2021-09-30 09:38:49 +0530 | [diff] [blame] | 36 | u8 tdp = get_cpu_tdp(); |
| 37 | |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 38 | for (size_t i = 0; i < ARRAY_SIZE(limits); i++) { |
Sumeet Pawnikar | e06e43a | 2021-09-30 09:38:49 +0530 | [diff] [blame] | 39 | if (mchid == limits[i].mchid && tdp == limits[i].cpu_tdp) { |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 40 | struct dptf_power_limits *settings = &config->controls.power_limits; |
Sumeet Pawnikar | e415df9 | 2021-09-30 09:51:42 +0530 | [diff] [blame^] | 41 | config_t *conf = config_of_soc(); |
| 42 | struct soc_power_limits_config *soc_config = conf->power_limits_config; |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 43 | settings->pl1.min_power = limits[i].pl1_min_power; |
| 44 | settings->pl1.max_power = limits[i].pl1_max_power; |
| 45 | settings->pl2.min_power = limits[i].pl2_min_power; |
| 46 | settings->pl2.max_power = limits[i].pl2_max_power; |
Sumeet Pawnikar | e415df9 | 2021-09-30 09:51:42 +0530 | [diff] [blame^] | 47 | soc_config->tdp_pl4 = DIV_ROUND_UP(limits[i].pl4_power, |
| 48 | MILLIWATTS_TO_WATTS); |
| 49 | printk(BIOS_INFO, "Overriding power limits PL1 (%u, %u) PL2 (%u, %u) PL4 (%u)\n", |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 50 | limits[i].pl1_min_power, |
| 51 | limits[i].pl1_max_power, |
| 52 | limits[i].pl2_min_power, |
Sumeet Pawnikar | e415df9 | 2021-09-30 09:51:42 +0530 | [diff] [blame^] | 53 | limits[i].pl2_max_power, |
| 54 | limits[i].pl4_power); |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 55 | } |
| 56 | } |
| 57 | } |
| 58 | |
Subrata Banik | 06a8922 | 2021-09-09 21:58:48 +0530 | [diff] [blame] | 59 | static const struct typec_aux_bias_pads pad_config = { GPP_E23, GPP_E22 }; |
| 60 | |
| 61 | static const struct board_id_iom_port_config { |
| 62 | int board_id; |
| 63 | enum typec_port_index port; |
| 64 | } port_config[] = { |
| 65 | { ADL_P_LP4_1, TYPE_C_PORT_2 }, |
| 66 | { ADL_P_LP4_2, TYPE_C_PORT_2 }, |
| 67 | { ADL_P_DDR4_1, TYPE_C_PORT_2 }, |
| 68 | { ADL_P_DDR4_2, TYPE_C_PORT_2 }, |
| 69 | { ADL_P_LP5_1, TYPE_C_PORT_2 }, |
| 70 | { ADL_P_LP5_2, TYPE_C_PORT_2 }, |
| 71 | { ADL_M_LP4, TYPE_C_PORT_1 }, |
| 72 | { ADL_M_LP5, TYPE_C_PORT_0 }, |
| 73 | }; |
| 74 | |
| 75 | static void variant_update_typec_init_config(void) |
| 76 | { |
| 77 | /* Skip filling aux bias gpio pads for Windows SKUs */ |
| 78 | if (!(CONFIG(BOARD_INTEL_ADLRVP_P_EXT_EC) || CONFIG(BOARD_INTEL_ADLRVP_M_EXT_EC))) |
| 79 | return; |
| 80 | |
| 81 | config_t *config = config_of_soc(); |
| 82 | int board_id = get_board_id(); |
| 83 | for (int i = 0; i < ARRAY_SIZE(port_config); i++) { |
| 84 | if (board_id != port_config[i].board_id) |
| 85 | continue; |
| 86 | |
| 87 | memcpy(&config->typec_aux_bias_pads[port_config[i].port], &pad_config, |
| 88 | sizeof(pad_config)); |
| 89 | } |
| 90 | } |
| 91 | |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 92 | void variant_devtree_update(void) |
| 93 | { |
| 94 | variant_update_power_limits(); |
Subrata Banik | 06a8922 | 2021-09-09 21:58:48 +0530 | [diff] [blame] | 95 | variant_update_typec_init_config(); |
Sumeet Pawnikar | 698ee27 | 2021-08-09 16:08:40 +0530 | [diff] [blame] | 96 | } |