Angel Pons | f23ae0b | 2020-04-02 23:48:12 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
| 4 | #include <acpi/acpigen.h> |
Elyes Haouas | ad65e8c | 2022-10-31 14:02:13 +0100 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <cpu/cpu.h> |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 7 | #include <cpu/intel/speedstep.h> |
| 8 | #include <cpu/intel/turbo.h> |
Elyes Haouas | ad65e8c | 2022-10-31 14:02:13 +0100 | [diff] [blame] | 9 | #include <cpu/x86/msr.h> |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 10 | #include <device/device.h> |
Elyes Haouas | ad65e8c | 2022-10-31 14:02:13 +0100 | [diff] [blame] | 11 | #include <types.h> |
| 12 | |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 13 | #include "model_2065x.h" |
| 14 | #include "chip.h" |
| 15 | |
| 16 | static int get_cores_per_package(void) |
| 17 | { |
| 18 | struct cpuinfo_x86 c; |
| 19 | struct cpuid_result result; |
| 20 | int cores = 1; |
| 21 | |
| 22 | get_fms(&c, cpuid_eax(1)); |
| 23 | if (c.x86 != 6) |
| 24 | return 1; |
| 25 | |
| 26 | result = cpuid_ext(0xb, 1); |
| 27 | cores = result.ebx & 0xff; |
| 28 | |
| 29 | return cores; |
| 30 | } |
| 31 | |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 32 | static void generate_C_state_entries(void) |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 33 | { |
Angel Pons | 00d6660 | 2021-01-21 22:05:34 +0100 | [diff] [blame] | 34 | /* TODO */ |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 35 | } |
| 36 | |
| 37 | static acpi_tstate_t tss_table_fine[] = { |
| 38 | { 100, 1000, 0, 0x00, 0 }, |
| 39 | { 94, 940, 0, 0x1f, 0 }, |
| 40 | { 88, 880, 0, 0x1e, 0 }, |
| 41 | { 82, 820, 0, 0x1d, 0 }, |
| 42 | { 75, 760, 0, 0x1c, 0 }, |
| 43 | { 69, 700, 0, 0x1b, 0 }, |
| 44 | { 63, 640, 0, 0x1a, 0 }, |
| 45 | { 57, 580, 0, 0x19, 0 }, |
| 46 | { 50, 520, 0, 0x18, 0 }, |
| 47 | { 44, 460, 0, 0x17, 0 }, |
| 48 | { 38, 400, 0, 0x16, 0 }, |
| 49 | { 32, 340, 0, 0x15, 0 }, |
| 50 | { 25, 280, 0, 0x14, 0 }, |
| 51 | { 19, 220, 0, 0x13, 0 }, |
| 52 | { 13, 160, 0, 0x12, 0 }, |
| 53 | }; |
| 54 | |
| 55 | static acpi_tstate_t tss_table_coarse[] = { |
| 56 | { 100, 1000, 0, 0x00, 0 }, |
| 57 | { 88, 875, 0, 0x1f, 0 }, |
| 58 | { 75, 750, 0, 0x1e, 0 }, |
| 59 | { 63, 625, 0, 0x1d, 0 }, |
| 60 | { 50, 500, 0, 0x1c, 0 }, |
| 61 | { 38, 375, 0, 0x1b, 0 }, |
| 62 | { 25, 250, 0, 0x1a, 0 }, |
| 63 | { 13, 125, 0, 0x19, 0 }, |
| 64 | }; |
| 65 | |
Vladimir Serbinenko | 9bb5c5c | 2014-11-09 03:51:32 +0100 | [diff] [blame] | 66 | static void generate_T_state_entries(int core, int cores_per_package) |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 67 | { |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 68 | /* Indicate SW_ALL coordination for T-states */ |
Vladimir Serbinenko | 9bb5c5c | 2014-11-09 03:51:32 +0100 | [diff] [blame] | 69 | acpigen_write_TSD_package(core, cores_per_package, SW_ALL); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 70 | |
| 71 | /* Indicate FFixedHW so OS will use MSR */ |
Vladimir Serbinenko | 9bb5c5c | 2014-11-09 03:51:32 +0100 | [diff] [blame] | 72 | acpigen_write_empty_PTC(); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 73 | |
| 74 | /* Set a T-state limit that can be modified in NVS */ |
Vladimir Serbinenko | 9bb5c5c | 2014-11-09 03:51:32 +0100 | [diff] [blame] | 75 | acpigen_write_TPC("\\TLVL"); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 76 | |
| 77 | /* |
| 78 | * CPUID.(EAX=6):EAX[5] indicates support |
| 79 | * for extended throttle levels. |
| 80 | */ |
| 81 | if (cpuid_eax(6) & (1 << 5)) |
Vladimir Serbinenko | 9bb5c5c | 2014-11-09 03:51:32 +0100 | [diff] [blame] | 82 | acpigen_write_TSS_package( |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 83 | ARRAY_SIZE(tss_table_fine), tss_table_fine); |
| 84 | else |
Vladimir Serbinenko | 9bb5c5c | 2014-11-09 03:51:32 +0100 | [diff] [blame] | 85 | acpigen_write_TSS_package( |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 86 | ARRAY_SIZE(tss_table_coarse), tss_table_coarse); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | static int calculate_power(int tdp, int p1_ratio, int ratio) |
| 90 | { |
| 91 | u32 m; |
| 92 | u32 power; |
| 93 | |
| 94 | /* |
| 95 | * M = ((1.1 - ((p1_ratio - ratio) * 0.00625)) / 1.1) ^ 2 |
| 96 | * |
| 97 | * Power = (ratio / p1_ratio) * m * tdp |
| 98 | */ |
| 99 | |
| 100 | m = (110000 - ((p1_ratio - ratio) * 625)) / 11; |
| 101 | m = (m * m) / 1000; |
| 102 | |
| 103 | power = ((ratio * 100000 / p1_ratio) / 100); |
| 104 | power *= (m / 100) * (tdp / 1000); |
| 105 | power /= 1000; |
| 106 | |
| 107 | return (int)power; |
| 108 | } |
| 109 | |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 110 | static void generate_P_state_entries(int core, int cores_per_package) |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 111 | { |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 112 | int ratio_min, ratio_max, ratio_turbo, ratio_step; |
| 113 | int coord_type, power_max, num_entries; |
| 114 | int ratio, power, clock, clock_max; |
| 115 | msr_t msr; |
| 116 | |
| 117 | /* Determine P-state coordination type from MISC_PWR_MGMT[0] */ |
| 118 | msr = rdmsr(MSR_MISC_PWR_MGMT); |
| 119 | if (msr.lo & MISC_PWR_MGMT_EIST_HW_DIS) |
| 120 | coord_type = SW_ANY; |
| 121 | else |
| 122 | coord_type = HW_ALL; |
| 123 | |
| 124 | /* Get bus ratio limits and calculate clock speeds */ |
| 125 | msr = rdmsr(MSR_PLATFORM_INFO); |
| 126 | ratio_min = (msr.hi >> (40-32)) & 0xff; /* Max Efficiency Ratio */ |
| 127 | |
Angel Pons | 9f0093d | 2021-01-21 22:17:23 +0100 | [diff] [blame] | 128 | /* Max Non-Turbo Ratio */ |
| 129 | ratio_max = (msr.lo >> 8) & 0xff; |
| 130 | |
Angel Pons | 95de231 | 2020-02-17 13:08:53 +0100 | [diff] [blame] | 131 | clock_max = ratio_max * IRONLAKE_BCLK + ratio_max / 3; |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 132 | |
| 133 | /* Calculate CPU TDP in mW */ |
| 134 | power_max = 25000; |
| 135 | |
| 136 | /* Write _PCT indicating use of FFixedHW */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 137 | acpigen_write_empty_PCT(); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 138 | |
| 139 | /* Write _PPC with no limit on supported P-state */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 140 | acpigen_write_PPC_NVS(); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 141 | |
| 142 | /* Write PSD indicating configured coordination type */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 143 | acpigen_write_PSD_package(core, cores_per_package, coord_type); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 144 | |
| 145 | /* Add P-state entries in _PSS table */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 146 | acpigen_write_name("_PSS"); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 147 | |
| 148 | /* Determine ratio points */ |
| 149 | ratio_step = PSS_RATIO_STEP; |
| 150 | num_entries = (ratio_max - ratio_min) / ratio_step; |
| 151 | while (num_entries > PSS_MAX_ENTRIES-1) { |
| 152 | ratio_step <<= 1; |
| 153 | num_entries >>= 1; |
| 154 | } |
| 155 | |
| 156 | /* P[T] is Turbo state if enabled */ |
| 157 | if (get_turbo_state() == TURBO_ENABLED) { |
| 158 | /* _PSS package count including Turbo */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 159 | acpigen_write_package(num_entries + 2); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 160 | |
| 161 | msr = rdmsr(MSR_TURBO_RATIO_LIMIT); |
| 162 | ratio_turbo = msr.lo & 0xff; |
| 163 | |
| 164 | /* Add entry for Turbo ratio */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 165 | acpigen_write_PSS_package( |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 166 | clock_max + 1, /*MHz*/ |
| 167 | power_max, /*mW*/ |
| 168 | PSS_LATENCY_TRANSITION, /*lat1*/ |
| 169 | PSS_LATENCY_BUSMASTER, /*lat2*/ |
| 170 | ratio_turbo, /*control*/ |
| 171 | ratio_turbo); /*status*/ |
| 172 | } else { |
| 173 | /* _PSS package count without Turbo */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 174 | acpigen_write_package(num_entries + 1); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 175 | } |
| 176 | |
| 177 | /* First regular entry is max non-turbo ratio */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 178 | acpigen_write_PSS_package( |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 179 | clock_max, /*MHz*/ |
| 180 | power_max, /*mW*/ |
| 181 | PSS_LATENCY_TRANSITION, /*lat1*/ |
| 182 | PSS_LATENCY_BUSMASTER, /*lat2*/ |
| 183 | ratio_max, /*control*/ |
| 184 | ratio_max); /*status*/ |
| 185 | |
| 186 | /* Generate the remaining entries */ |
| 187 | for (ratio = ratio_min + ((num_entries - 1) * ratio_step); |
| 188 | ratio >= ratio_min; ratio -= ratio_step) { |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 189 | /* Calculate power at this ratio */ |
| 190 | power = calculate_power(power_max, ratio_max, ratio); |
Angel Pons | 95de231 | 2020-02-17 13:08:53 +0100 | [diff] [blame] | 191 | clock = ratio * IRONLAKE_BCLK + ratio / 3; |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 192 | |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 193 | acpigen_write_PSS_package( |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 194 | clock, /*MHz*/ |
| 195 | power, /*mW*/ |
| 196 | PSS_LATENCY_TRANSITION, /*lat1*/ |
| 197 | PSS_LATENCY_BUSMASTER, /*lat2*/ |
| 198 | ratio, /*control*/ |
| 199 | ratio); /*status*/ |
| 200 | } |
| 201 | |
| 202 | /* Fix package length */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 203 | acpigen_pop_len(); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 204 | } |
| 205 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 206 | void generate_cpu_entries(const struct device *device) |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 207 | { |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 208 | int totalcores = dev_count_cpu(); |
| 209 | int cores_per_package = get_cores_per_package(); |
Kyösti Mälkki | e39a3e3 | 2023-04-12 16:39:12 +0300 | [diff] [blame^] | 210 | int numcpus = totalcores / cores_per_package; |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 211 | |
| 212 | printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", |
| 213 | numcpus, cores_per_package); |
| 214 | |
Kyösti Mälkki | e39a3e3 | 2023-04-12 16:39:12 +0300 | [diff] [blame^] | 215 | for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { |
| 216 | for (int core_id = 0; core_id < cores_per_package; core_id++) { |
Elyes Haouas | 9ac50e1 | 2023-01-28 09:51:05 +0100 | [diff] [blame] | 217 | /* Generate Scope(\_SB) { Device(CPUx */ |
Kyösti Mälkki | e39a3e3 | 2023-04-12 16:39:12 +0300 | [diff] [blame^] | 218 | acpigen_write_processor_device(cpu_id * cores_per_package + core_id); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 219 | |
| 220 | /* Generate P-state tables */ |
Kyösti Mälkki | e39a3e3 | 2023-04-12 16:39:12 +0300 | [diff] [blame^] | 221 | generate_P_state_entries(cpu_id, cores_per_package); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 222 | |
| 223 | /* Generate C-state tables */ |
Vladimir Serbinenko | 226d784 | 2014-11-04 21:09:23 +0100 | [diff] [blame] | 224 | generate_C_state_entries(); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 225 | |
| 226 | /* Generate T-state tables */ |
Kyösti Mälkki | e39a3e3 | 2023-04-12 16:39:12 +0300 | [diff] [blame^] | 227 | generate_T_state_entries(cpu_id, cores_per_package); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 228 | |
Elyes Haouas | 9ac50e1 | 2023-01-28 09:51:05 +0100 | [diff] [blame] | 229 | acpigen_write_processor_device_end(); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 230 | } |
| 231 | } |
Arthur Heymans | 04008a9 | 2018-11-28 12:13:54 +0100 | [diff] [blame] | 232 | |
| 233 | /* PPKG is usually used for thermal management |
| 234 | of the first and only package. */ |
| 235 | acpigen_write_processor_package("PPKG", 0, cores_per_package); |
| 236 | |
| 237 | /* Add a method to notify processor nodes */ |
| 238 | acpigen_write_processor_cnot(cores_per_package); |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 239 | } |
| 240 | |
| 241 | struct chip_operations cpu_intel_model_2065x_ops = { |
Angel Pons | 31b7ee4 | 2020-02-17 14:04:28 +0100 | [diff] [blame] | 242 | CHIP_NAME("Intel Arrandale CPU") |
Vladimir Serbinenko | 22dcdd9 | 2013-06-06 22:10:45 +0200 | [diff] [blame] | 243 | }; |