blob: 40e16b3d02d92be5e0b1644c252edc874f80ae7b [file] [log] [blame]
Sven Schnellee2ca71e2011-02-14 20:02:47 +00001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2009 coresystems GmbH
5## Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
6##
7## This program is free software; you can redistribute it and/or
8## modify it under the terms of the GNU General Public License as
9## published by the Free Software Foundation; version 2 of
10## the License.
11##
12## This program is distributed in the hope that it will be useful,
13## but WITHOUT ANY WARRANTY; without even the implied warranty of
14## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15## GNU General Public License for more details.
16##
17## You should have received a copy of the GNU General Public License
18## along with this program; if not, write to the Free Software
19## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
20## MA 02110-1301 USA
21##
22
23chip northbridge/intel/i945
24
25 device lapic_cluster 0 on
26 chip cpu/intel/socket_mFCPGA478
27 device lapic 0 on end
28 end
29 end
30
31 device pci_domain 0 on
32 device pci 00.0 on end # host bridge
33 device pci 02.0 on end # vga controller
34 device pci 02.1 on end # display controller
35 chip southbridge/intel/i82801gx
36 register "pirqa_routing" = "0x0b"
37 register "pirqb_routing" = "0x0b"
38 register "pirqc_routing" = "0x0b"
39 register "pirqd_routing" = "0x0b"
40 register "pirqe_routing" = "0x0b"
41 register "pirqf_routing" = "0x0b"
42 register "pirqg_routing" = "0x0b"
43 register "pirqh_routing" = "0x0b"
44
45 # GPI routing
46 # 0 No effect (default)
47 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
48 # 2 SCI (if corresponding GPIO_EN bit is also set)
49 register "gpi13_routing" = "2"
50 register "gpi12_routing" = "2"
51 register "gpi8_routing" = "2"
52
53 register "sata_ahci" = "0x0"
54
55 register "gpe0_en" = "0x11000006"
56
57 device pci 1b.0 on end # Audio Controller
58 device pci 1c.0 on end # Ethernet
59 device pci 1c.1 on end # Atheros WLAN
60 device pci 1d.0 on end # USB UHCI
61 device pci 1d.1 on end # USB UHCI
62 device pci 1d.2 on end # USB UHCI
63 device pci 1d.3 on end # USB UHCI
64 device pci 1d.7 on end # USB2 EHCI
65 device pci 1f.0 on # PCI-LPC bridge
66 chip ec/lenovo/pmh7
67 device pnp ff.1 on # dummy
68 end
69 end
70 chip ec/acpi
71 device pnp ff.2 on # dummy
72 io 0x60 = 0x62
73 io 0x62 = 0x66
74 io 0x64 = 0x1600
75 io 0x66 = 0x1604
76 end
77 end
78 chip superio/nsc/pc87382
79 device pnp 164e.2 on # IR
80 io 0x60 = 0x2f8
81 end
82
83 device pnp 164e.3 off # Serial Port
84 io 0x60 = 0x3f8
85 end
86
87 device pnp 164e.7 on # GPIO
88 io 0x60 = 0x1680
89 end
90
91 device pnp 164e.19 on # DLPC
92 io 0x60 = 0x164c
93 end
94 end
95
96 chip superio/nsc/pc87392
97 device pnp 2e.0 off #FDC
98 end
99
100 device pnp 2e.1 on # Parallel Port
101 io 0x60 = 0x3bc
102 irq 0x70 = 7
103 end
104
105 device pnp 2e.2 off # Serial Port / IR
106 io 0x60 = 0x2f8
107 irq 0x70 = 4
108 end
109
110 device pnp 2e.3 on # Serial Port
111 io 0x60 = 0x3f8
112 irq 0x70 = 4
113 end
114
115 device pnp 2e.7 on # GPIO
116 io 0x60 = 0x1620
117 end
118
119 device pnp 2e.a off # WDT
120 end
121 end
122 end
123 device pci 1f.1 off end # IDE
124 device pci 1f.2 on end # SATA
125 device pci 1f.3 on end # SMBus
126 end
127 chip southbridge/ricoh/rl5c476
128 end
129 end
130end