blob: 2e44b78dbe6def38ed6736398ce0b5754c01553c [file] [log] [blame]
Stefan Reinauer6651da32012-04-27 23:16:30 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +010018 * Foundation, Inc.
Stefan Reinauer6651da32012-04-27 23:16:30 +020019 */
20
21DefinitionBlock(
22 "dsdt.aml",
23 "DSDT",
24 0x02, // DSDT revision: ACPI v2.0
25 "COREv4", // OEM id
Paul Menzeld2e0e292013-02-04 10:31:34 +010026 "COREBOOT", // OEM table id
Stefan Reinauer6651da32012-04-27 23:16:30 +020027 0x20110725 // OEM revision
28)
29{
Vladimir Serbinenkoe2887582015-05-17 00:20:52 +020030 #include <southbridge/intel/bd82x6x/acpi/platform.asl>
31
Stefan Reinauer6651da32012-04-27 23:16:30 +020032 // Some generic macros
33 #include "acpi/platform.asl"
34
35 // global NVS and variables
36 #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
37
38 // General Purpose Events
39 //#include "acpi/gpe.asl"
40
41 #include "acpi/thermal.asl"
42
43 #include "../../../cpu/intel/model_206ax/acpi/cpu.asl"
44
45 Scope (\_SB) {
46 Device (PCI0)
47 {
48 #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
49 #include <southbridge/intel/bd82x6x/acpi/pch.asl>
50 }
51 }
52
53 #include "acpi/chromeos.asl"
Stefan Reinauer2198c582012-06-07 15:38:44 -070054 #include <vendorcode/google/chromeos/acpi/chromeos.asl>
Stefan Reinauer6651da32012-04-27 23:16:30 +020055
56 /* Chipset specific sleep states */
57 #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
58}