blob: 62769950efe8b1875573e1cd1b2d373f9198a5bd [file] [log] [blame]
Patrick Georgie72a8a32012-11-06 11:05:09 +01001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Patrick Georgie72a8a32012-11-06 11:05:09 +010019 */
20
21#include <console/console.h>
22#include <device/device.h>
23#include <device/pci.h>
24#include <device/pci_ids.h>
25#include "i82801ix.h"
Kyösti Mälkkie2227a22014-02-05 13:02:55 +020026#include <device/pci_ehci.h>
Patrick Georgie72a8a32012-11-06 11:05:09 +010027
28static void usb_ehci_init(struct device *dev)
29{
30 u32 reg32;
31
32 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
33 reg32 = pci_read_config32(dev, PCI_COMMAND);
34 reg32 |= PCI_COMMAND_MASTER;
35 pci_write_config32(dev, PCI_COMMAND, reg32);
36
37 printk(BIOS_DEBUG, "done.\n");
38}
39
40static void usb_ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
41{
42 u8 access_cntl;
43
44 access_cntl = pci_read_config8(dev, 0x80);
45
46 /* Enable writes to protected registers. */
47 pci_write_config8(dev, 0x80, access_cntl | 1);
48
49 if (!vendor || !device) {
50 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
51 pci_read_config32(dev, PCI_VENDOR_ID));
52 } else {
53 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
54 ((device & 0xffff) << 16) | (vendor & 0xffff));
55 }
56
57 /* Restore protection. */
58 pci_write_config8(dev, 0x80, access_cntl);
59}
60
Patrick Georgie72a8a32012-11-06 11:05:09 +010061static const unsigned short pci_device_ids[] = {
62 0x293a,
63 0x293c,
64 0
65};
66
67static struct pci_operations lops_pci = {
68 .set_subsystem = &usb_ehci_set_subsystem,
69};
70
71static struct device_operations usb_ehci_ops = {
Kyösti Mälkkifb387df2013-06-07 22:16:52 +030072 .read_resources = pci_ehci_read_resources,
73 .set_resources = pci_dev_set_resources,
Patrick Georgie72a8a32012-11-06 11:05:09 +010074 .enable_resources = pci_dev_enable_resources,
75 .init = usb_ehci_init,
76 .scan_bus = 0,
77 .ops_pci = &lops_pci,
78};
79
80static const struct pci_driver pch_usb_ehci1 __pci_driver = {
81 .ops = &usb_ehci_ops,
82 .vendor = PCI_VENDOR_ID_INTEL,
83 .devices = pci_device_ids,
84};