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David Hendrickse1822d92010-07-22 22:56:44 +00001/*
2 * This file is part of the superiotool project.
3 *
4 * Copyright (C) 2010 Google Inc.
5 * Written by David Hendricks <dhendrix@google.com> for Nuvoton Technology Corp.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include "superiotool.h"
23
24#define DEVICE_ID_REG 0x20 /* Super I/O ID (SID) / family */
25#define DEVICE_REV_REG 0x27 /* Super I/O revision ID (SRID) */
26
27static const struct superio_registers reg_table[] = {
28 {0xfc, "WPCE775x / NPCE781x", {
29 {NOLDN, NULL,
30 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
31 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
32 {0xFC,0x11,RSVD,RSVD,RSVD,0x00,0x00,MISC,0x00,
33 0x04,RSVD,RSVD,RSVD,0x00,RSVD,RSVD,EOT}},
34 {0x03, "CIR Port (CIRP)", /* where supported */
35 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
36 {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
37 {0x04, "Mobile System Wake-Up Control Config (MSWC)",
38 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
39 {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
40 {0x05, "Mouse config (KBC)",
41 {0x30,0x70,0x71,0x74,0x75,EOT},
42 {0x00,0x0c,0x03,0x04,0x04,EOT}},
43 {0x06, "Keyboard config (KBC)",
44 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
45 {0x00,0x00,0x60,0x00,0x64,0x01,0x03,0x04,0x04,EOT}},
46 {0x0f, "Shared memory (SHM)",
47 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
48 0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,EOT},
49 {0x00,0x00,0x00,0x00,0x00,0x04,0x04,MISC,0x07,RSVD,
50 RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
51 {0x11, "Power management I/F Channel 1 (PM1)",
52 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
53 {0x00,0x00,0x62,0x00,0x66,0x01,0x03,0x04,0x04,EOT}},
54 {0x12, "Power management I/F Channel 2 (PM2)",
55 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
56 {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,0x04,0x04,EOT}},
57 {0x15, "Enhanced Wake On CIR (EWOC)",
58 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
59 {0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
60 {0x17, "Power Management I/F Channel 3 (PM3)",
61 {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
62 {0x00,0x00,0x6a,0x00,0x6e,0x01,0x03,0x04,0x04,EOT}},
63 {0x1a, "Serial Port with Fast Infrared Port (FIR)",
64 {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
65 {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
66 {EOT}}},
67 {EOT}
68};
69
70void probe_idregs_nuvoton(uint16_t port)
71{
72 uint8_t sid, srid;
73 uint8_t chip_id = 0, chip_rev = 0;
74
75 probing_for("Nuvoton", "(sid=0xfc) ", port);
76
77 sid = regval(port, DEVICE_ID_REG);
78 srid = regval(port, DEVICE_REV_REG);
79
80 if (sid == 0xfc) { /* WPCE775xL family */
81 /*
82 * bits 7-5: Chip ID
83 * bits 4-0: Chip revision
84 */
85 chip_id = srid >> 5;
86 chip_rev = srid & 0x1f;
87 }
88
89 if (superio_unknown(reg_table, sid)) {
90 if (verbose)
91 printf(NOTFOUND
92 "sid=0x%02x, id=0x%02x, rev=0x%02x\n", sid,
93 chip_id, chip_rev);
94 return;
95 }
96
97 printf("Found Nuvoton %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
98 get_superio_name(reg_table, sid), chip_id, chip_rev, port);
99 chip_found = 1;
100
101 dump_superio("Nuvoton", reg_table, port, sid, LDN_SEL);
102}
103
104void print_nuvoton_chips(void)
105{
106 print_vendor_chips("Nuvoton", reg_table);
107}