Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 2 | |
| 3 | #include <cpu/cpu.h> |
| 4 | #include <cpu/x86/mp.h> |
| 5 | #include <cpu/x86/mtrr.h> |
| 6 | #include <cpu/x86/msr.h> |
Kyösti Mälkki | b2a5f0b | 2019-08-04 19:54:32 +0300 | [diff] [blame] | 7 | #include <cpu/x86/smm.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 8 | #include <cpu/amd/msr.h> |
Kyösti Mälkki | e31ec29 | 2019-08-10 17:27:01 +0300 | [diff] [blame] | 9 | #include <cpu/amd/amd64_save_state.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 10 | #include <cpu/x86/lapic.h> |
| 11 | #include <device/device.h> |
| 12 | #include <device/pci_ops.h> |
| 13 | #include <soc/pci_devs.h> |
| 14 | #include <soc/cpu.h> |
Raul E Rangel | cd39a41 | 2020-05-07 15:16:15 -0600 | [diff] [blame] | 15 | #include <soc/reset.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 16 | #include <soc/smi.h> |
| 17 | #include <soc/iomap.h> |
| 18 | #include <console/console.h> |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 19 | #include <cpu/amd/microcode.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 20 | |
| 21 | /* |
| 22 | * MP and SMM loading initialization. |
| 23 | */ |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 24 | struct smm_relocation_params { |
| 25 | msr_t tseg_base; |
| 26 | msr_t tseg_mask; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 27 | }; |
| 28 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 29 | static struct smm_relocation_params smm_reloc_params; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * Do essential initialization tasks before APs can be fired up - |
| 33 | * |
| 34 | * 1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This |
| 35 | * creates the MTRR solution that the APs will use. Otherwise APs will try to |
| 36 | * apply the incomplete solution as the BSP is calculating it. |
| 37 | */ |
| 38 | static void pre_mp_init(void) |
| 39 | { |
Aaron Durbin | a2c045b | 2020-05-28 10:19:18 -0600 | [diff] [blame] | 40 | x86_setup_mtrrs_with_detect_no_above_4gb(); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 41 | x86_mtrr_check(); |
| 42 | } |
| 43 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 44 | int get_cpu_count(void) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 45 | { |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 46 | return 1 + (cpuid_ecx(0x80000008) & 0xff); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 47 | } |
| 48 | |
Chris Wang | e2497d0 | 2020-08-03 22:36:13 +0800 | [diff] [blame] | 49 | static void set_cstate_io_addr(void) |
| 50 | { |
| 51 | msr_t cst_addr; |
| 52 | |
| 53 | cst_addr.hi = 0; |
| 54 | cst_addr.lo = ACPI_CPU_CONTROL; |
| 55 | wrmsr(MSR_CSTATE_ADDRESS, cst_addr); |
| 56 | } |
| 57 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 58 | static void fill_in_relocation_params(struct smm_relocation_params *params) |
| 59 | { |
| 60 | uintptr_t tseg_base; |
| 61 | size_t tseg_size; |
| 62 | |
| 63 | smm_region(&tseg_base, &tseg_size); |
| 64 | |
| 65 | params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB); |
| 66 | params->tseg_base.hi = 0; |
| 67 | params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB); |
| 68 | params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1); |
| 69 | |
| 70 | params->tseg_mask.lo |= SMM_TSEG_WB; |
| 71 | } |
| 72 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 73 | static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, |
| 74 | size_t *smm_save_state_size) |
| 75 | { |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 76 | printk(BIOS_DEBUG, "Setting up SMI for CPU\n"); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 77 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 78 | fill_in_relocation_params(&smm_reloc_params); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 79 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 80 | smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 81 | *smm_save_state_size = sizeof(amd64_smm_state_save_area_t); |
| 82 | } |
| 83 | |
| 84 | static void relocation_handler(int cpu, uintptr_t curr_smbase, |
| 85 | uintptr_t staggered_smbase) |
| 86 | { |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 87 | struct smm_relocation_params *relo_params = &smm_reloc_params; |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 88 | amd64_smm_state_save_area_t *smm_state; |
| 89 | |
Kyösti Mälkki | 8699724 | 2019-08-06 01:44:58 +0300 | [diff] [blame] | 90 | wrmsr(SMM_ADDR_MSR, relo_params->tseg_base); |
| 91 | wrmsr(SMM_MASK_MSR, relo_params->tseg_mask); |
| 92 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 93 | smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase); |
| 94 | smm_state->smbase = staggered_smbase; |
| 95 | } |
| 96 | |
| 97 | static const struct mp_ops mp_ops = { |
| 98 | .pre_mp_init = pre_mp_init, |
| 99 | .get_cpu_count = get_cpu_count, |
| 100 | .get_smm_info = get_smm_info, |
| 101 | .relocation_handler = relocation_handler, |
Kyösti Mälkki | 87e6796 | 2020-05-31 09:59:14 +0300 | [diff] [blame] | 102 | .post_mp_init = global_smi_enable, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 103 | }; |
| 104 | |
Kyösti Mälkki | 79e12ab | 2020-05-31 09:21:07 +0300 | [diff] [blame] | 105 | void mp_init_cpus(struct bus *cpu_bus) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 106 | { |
| 107 | /* Clear for take-off */ |
Kyösti Mälkki | 79e12ab | 2020-05-31 09:21:07 +0300 | [diff] [blame] | 108 | if (mp_init_with_smm(cpu_bus, &mp_ops) < 0) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 109 | printk(BIOS_ERR, "MP initialization failure.\n"); |
| 110 | |
Raul E Rangel | 93375f2 | 2020-06-05 15:48:21 -0600 | [diff] [blame] | 111 | /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 112 | mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); |
| 113 | |
| 114 | set_warm_reset_flag(); |
| 115 | } |
| 116 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 117 | static void model_17_init(struct device *dev) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 118 | { |
| 119 | check_mca(); |
| 120 | setup_lapic(); |
Chris Wang | e2497d0 | 2020-08-03 22:36:13 +0800 | [diff] [blame] | 121 | set_cstate_io_addr(); |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 122 | |
| 123 | amd_update_microcode_from_cbfs(); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | static struct device_operations cpu_dev_ops = { |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 127 | .init = model_17_init, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 128 | }; |
| 129 | |
| 130 | static struct cpu_device_id cpu_table[] = { |
Felix Held | 53c173e | 2020-11-05 17:24:18 +0100 | [diff] [blame] | 131 | { X86_VENDOR_AMD, RAVEN1_B0_CPUID}, |
Felix Held | ab114c9 | 2020-05-22 02:40:40 +0200 | [diff] [blame] | 132 | { X86_VENDOR_AMD, PICASSO_B0_CPUID }, |
| 133 | { X86_VENDOR_AMD, PICASSO_B1_CPUID }, |
| 134 | { X86_VENDOR_AMD, RAVEN2_A0_CPUID }, |
| 135 | { X86_VENDOR_AMD, RAVEN2_A1_CPUID }, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 136 | { 0, 0 }, |
| 137 | }; |
| 138 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 139 | static const struct cpu_driver model_17 __cpu_driver = { |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 140 | .ops = &cpu_dev_ops, |
| 141 | .id_table = cpu_table, |
| 142 | }; |