Ronak Kanabar | 1ae366f | 2023-06-07 01:21:56 +0530 | [diff] [blame] | 1 | /** @file |
| 2 | Intel FSP Header File definition from Intel Firmware Support Package External |
| 3 | Architecture Specification v2.0 and above. |
| 4 | |
| 5 | Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR> |
| 6 | SPDX-License-Identifier: BSD-2-Clause-Patent |
| 7 | |
| 8 | **/ |
| 9 | |
| 10 | #include <Base.h> |
| 11 | |
| 12 | #ifndef __FSP_HEADER_FILE_H__ |
| 13 | #define __FSP_HEADER_FILE_H__ |
| 14 | |
| 15 | #define FSP_HEADER_REVISION_3 3 |
| 16 | |
| 17 | #define FSPE_HEADER_REVISION_1 1 |
| 18 | #define FSPP_HEADER_REVISION_1 1 |
| 19 | |
| 20 | /// |
| 21 | /// Fixed FSP header offset in the FSP image |
| 22 | /// |
| 23 | #define FSP_INFO_HEADER_OFF 0x94 |
| 24 | |
| 25 | #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x |
| 26 | |
| 27 | #define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H') |
| 28 | |
| 29 | #define IMAGE_ATTRIBUTE_GRAPHICS_SUPPORT BIT0 |
| 30 | #define IMAGE_ATTRIBUTE_DISPATCH_MODE_SUPPORT BIT1 |
| 31 | #define IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT BIT2 |
| 32 | #define FSP_IA32 0 |
| 33 | #define FSP_X64 1 |
| 34 | |
Subrata Banik | dc781d3 | 2024-04-01 17:45:54 +0000 | [diff] [blame^] | 35 | #define FSP_SIG 0x48505346 /* 'FSPH' */ |
| 36 | |
Ronak Kanabar | 1ae366f | 2023-06-07 01:21:56 +0530 | [diff] [blame] | 37 | #pragma pack(1) |
| 38 | |
| 39 | /// |
| 40 | /// FSP Information Header as described in FSP v2.0 Spec section 5.1.1. |
| 41 | /// |
| 42 | typedef struct { |
| 43 | /// |
| 44 | /// Byte 0x00: Signature ('FSPH') for the FSP Information Header. |
| 45 | /// |
| 46 | UINT32 Signature; |
| 47 | /// |
| 48 | /// Byte 0x04: Length of the FSP Information Header. |
| 49 | /// |
| 50 | UINT32 HeaderLength; |
| 51 | /// |
| 52 | /// Byte 0x08: Reserved. |
| 53 | /// |
| 54 | UINT8 Reserved1[2]; |
| 55 | /// |
| 56 | /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format. |
| 57 | /// For revision v2.4 the value will be 0x24. |
| 58 | /// |
| 59 | UINT8 SpecVersion; |
| 60 | /// |
| 61 | /// Byte 0x0B: Revision of the FSP Information Header. |
| 62 | /// The Current value for this field is 0x7. |
| 63 | /// |
| 64 | UINT8 HeaderRevision; |
| 65 | /// |
| 66 | /// Byte 0x0C: Revision of the FSP binary. |
| 67 | /// Major.Minor.Revision.Build |
| 68 | /// If FSP HeaderRevision is <= 5, the ImageRevision can be decoded as follows: |
| 69 | /// 7 : 0 - Build Number |
| 70 | /// 15 : 8 - Revision |
| 71 | /// 23 : 16 - Minor Version |
| 72 | /// 31 : 24 - Major Version |
| 73 | /// If FSP HeaderRevision is >= 6, ImageRevision specifies the low-order bytes of the build number and revision |
| 74 | /// while ExtendedImageRevision specifies the high-order bytes of the build number and revision. |
| 75 | /// 7 : 0 - Low Byte of Build Number |
| 76 | /// 15 : 8 - Low Byte of Revision |
| 77 | /// 23 : 16 - Minor Version |
| 78 | /// 31 : 24 - Major Version |
| 79 | /// |
| 80 | UINT32 ImageRevision; |
| 81 | /// |
| 82 | /// Byte 0x10: Signature string that will help match the FSP Binary to a supported HW configuration. |
| 83 | /// |
| 84 | CHAR8 ImageId[8]; |
| 85 | /// |
| 86 | /// Byte 0x18: Size of the entire FSP binary. |
| 87 | /// |
| 88 | UINT32 ImageSize; |
| 89 | /// |
| 90 | /// Byte 0x1C: FSP binary preferred base address. |
| 91 | /// |
| 92 | UINT32 ImageBase; |
| 93 | /// |
| 94 | /// Byte 0x20: Attribute for the FSP binary. |
| 95 | /// Bit 0: Graphics Support - Set to 1 when FSP supports enabling Graphics Display. |
| 96 | /// Bit 1: Dispatch Mode Support - Set to 1 when FSP supports the optional Dispatch Mode API defined in Section 7.2 and 9. This bit is only valid if FSP HeaderRevision is >= 4. |
| 97 | /// Bit 2: 64-bit mode support - Set to 1 to indicate FSP supports 64-bit long mode interfaces. Set to 0 to indicate FSP supports 32-bit mode interfaces. This bit is only valid if FSP HeaderRevision is >= 7. |
| 98 | /// Bit 3: FSP Variable Services Support - Set to 1 to indicate FSP utilizes the FSP Variable Services defined in Section 9.6 to store non-volatile data. This bit is only valid if FSP HeaderRevision is >= 7. |
| 99 | /// Bits 15:4 - Reserved |
| 100 | /// |
| 101 | UINT16 ImageAttribute; |
| 102 | /// |
| 103 | /// Byte 0x22: Attributes of the FSP Component. |
| 104 | /// Bit 0 - Build Type |
| 105 | /// 0 - Debug Build |
| 106 | /// 1 - Release Build |
| 107 | /// Bit 1 - Release Type |
| 108 | /// 0 - Test Release |
| 109 | /// 1 - Official Release |
| 110 | /// Bit 11:2 - Reserved |
| 111 | /// Bits 15:12 - Component Type |
| 112 | /// 0000 - Reserved |
| 113 | /// 0001 - FSP-T |
| 114 | /// 0010 - FSP-M |
| 115 | /// 0011 - FSP-S |
| 116 | /// 0100 - FSP-I (FSP SMM) |
| 117 | /// 0101 to 0111 - Reserved |
| 118 | /// 1000 - FSP-O |
| 119 | /// 1001 to 1111 - Reserved |
| 120 | /// |
| 121 | UINT16 ComponentAttribute; |
| 122 | /// |
| 123 | /// Byte 0x24: Offset of the FSP configuration region. |
| 124 | /// |
| 125 | UINT32 CfgRegionOffset; |
| 126 | /// |
| 127 | /// Byte 0x28: Size of the FSP configuration region. |
| 128 | /// |
| 129 | UINT32 CfgRegionSize; |
| 130 | /// |
| 131 | /// Byte 0x2C: Reserved2. |
| 132 | /// |
| 133 | UINT32 Reserved2; |
| 134 | /// |
| 135 | /// Byte 0x30: The offset for the API to setup a temporary stack till the memory is initialized. |
| 136 | /// |
| 137 | UINT32 TempRamInitEntryOffset; |
| 138 | /// |
| 139 | /// Byte 0x34: Reserved3. |
| 140 | /// |
| 141 | UINT32 Reserved3; |
| 142 | /// |
| 143 | /// Byte 0x38: The offset for the API to inform the FSP about the different stages in the boot process. |
| 144 | /// |
| 145 | UINT32 NotifyPhaseEntryOffset; |
| 146 | /// |
| 147 | /// Byte 0x3C: The offset for the API to initialize the memory. |
| 148 | /// |
| 149 | UINT32 FspMemoryInitEntryOffset; |
| 150 | /// |
| 151 | /// Byte 0x40: The offset for the API to tear down temporary RAM. |
| 152 | /// |
| 153 | UINT32 TempRamExitEntryOffset; |
| 154 | /// |
| 155 | /// Byte 0x44: The offset for the API to initialize the CPU and chipset. |
| 156 | /// |
| 157 | UINT32 FspSiliconInitEntryOffset; |
| 158 | /// |
| 159 | /// Byte 0x48: Offset for the API for the optional Multi-Phase processor and chipset initialization. |
| 160 | /// This value is only valid if FSP HeaderRevision is >= 5. |
| 161 | /// If the value is set to 0x00000000, then this API is not available in this component. |
| 162 | /// |
| 163 | UINT32 FspMultiPhaseSiInitEntryOffset; |
| 164 | /// |
| 165 | /// Byte 0x4C: Extended revision of the FSP binary. |
| 166 | /// This value is only valid if FSP HeaderRevision is >= 6. |
| 167 | /// ExtendedImageRevision specifies the high-order byte of the revision and build number in the FSP binary revision. |
| 168 | /// 7 : 0 - High Byte of Build Number |
| 169 | /// 15 : 8 - High Byte of Revision |
| 170 | /// The FSP binary build number can be decoded as follows: |
| 171 | /// Build Number = (ExtendedImageRevision[7:0] << 8) | ImageRevision[7:0] |
| 172 | /// Revision = (ExtendedImageRevision[15:8] << 8) | ImageRevision[15:8] |
| 173 | /// Minor Version = ImageRevision[23:16] |
| 174 | /// Major Version = ImageRevision[31:24] |
| 175 | /// |
| 176 | UINT16 ExtendedImageRevision; |
| 177 | /// |
| 178 | /// Byte 0x4E: Reserved4. |
| 179 | /// |
| 180 | UINT16 Reserved4; |
| 181 | /// |
| 182 | /// Byte 0x50: Offset for the API for the Multi-Phase memory initialization. |
| 183 | /// |
| 184 | UINT32 FspMultiPhaseMemInitEntryOffset; |
| 185 | /// |
| 186 | /// Byte 0x54: Offset for the API to initialize SMM. |
| 187 | /// |
| 188 | UINT32 FspSmmInitEntryOffset; |
| 189 | } FSP_INFO_HEADER; |
| 190 | |
| 191 | /// |
| 192 | /// Signature of the FSP Extended Header |
| 193 | /// |
| 194 | #define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E') |
| 195 | |
| 196 | /// |
| 197 | /// FSP Information Extended Header as described in FSP v2.0 Spec section 5.1.2. |
| 198 | /// |
| 199 | typedef struct { |
| 200 | /// |
| 201 | /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header. |
| 202 | /// |
| 203 | UINT32 Signature; |
| 204 | /// |
| 205 | /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data. |
| 206 | /// |
| 207 | UINT32 Length; |
| 208 | /// |
| 209 | /// Byte 0x08: FSP producer defined revision of the table. |
| 210 | /// |
| 211 | UINT8 Revision; |
| 212 | /// |
| 213 | /// Byte 0x09: Reserved for future use. |
| 214 | /// |
| 215 | UINT8 Reserved; |
| 216 | /// |
| 217 | /// Byte 0x0A: FSP producer identification string |
| 218 | /// |
| 219 | CHAR8 FspProducerId[6]; |
| 220 | /// |
| 221 | /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions. |
| 222 | /// |
| 223 | UINT32 FspProducerRevision; |
| 224 | /// |
| 225 | /// Byte 0x14: Size of the FSP producer defined data (n) in bytes. |
| 226 | /// |
| 227 | UINT32 FspProducerDataSize; |
| 228 | /// |
| 229 | /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize. |
| 230 | /// |
| 231 | } FSP_INFO_EXTENDED_HEADER; |
| 232 | |
| 233 | // |
| 234 | // A generic table search algorithm for additional tables can be implemented with a |
| 235 | // signature search algorithm until a terminator signature 'FSPP' is found. |
| 236 | // |
| 237 | #define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P') |
| 238 | #define FSP_PATCH_TABLE_SIGNATURE FSP_FSPP_SIGNATURE |
| 239 | |
| 240 | /// |
| 241 | /// FSP Patch Table as described in FSP v2.0 Spec section 5.1.5. |
| 242 | /// |
| 243 | typedef struct { |
| 244 | /// |
| 245 | /// Byte 0x00: FSP Patch Table Signature "FSPP". |
| 246 | /// |
| 247 | UINT32 Signature; |
| 248 | /// |
| 249 | /// Byte 0x04: Size including the PatchData. |
| 250 | /// |
| 251 | UINT16 HeaderLength; |
| 252 | /// |
| 253 | /// Byte 0x06: Revision is set to 0x01. |
| 254 | /// |
| 255 | UINT8 HeaderRevision; |
| 256 | /// |
| 257 | /// Byte 0x07: Reserved for future use. |
| 258 | /// |
| 259 | UINT8 Reserved; |
| 260 | /// |
| 261 | /// Byte 0x08: Number of entries to Patch. |
| 262 | /// |
| 263 | UINT32 PatchEntryNum; |
| 264 | /// |
| 265 | /// Byte 0x0C: Patch Data. |
| 266 | /// |
| 267 | // UINT32 PatchData[]; |
| 268 | } FSP_PATCH_TABLE; |
| 269 | |
| 270 | #pragma pack() |
| 271 | |
| 272 | extern EFI_GUID gFspHeaderFileGuid; |
| 273 | |
| 274 | #endif |