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review.coreboot.org / coreboot / dbdf170dcdf9edbc860766606e53c6d647d89d38 / . / src / vendorcode / amd / agesa / f14 / Proc / Mem / Tech / mthdi.c
blob: 1ccab8f4a55ac6735c823f57681b5d9dd5854e15 [file] [log] [blame]
Frank Vibrans2b4c8312011-02-14 18:30:54 +0000[diff] [blame]1/* $NoKeywords:$ */
2/**
3 * @file
4 *
5 * mthdi.c
6 *
7 * Common technology hardware dram init support functions
8 *
9 * @xrefitem bom "File Content Label" "Release Content"
10 * @e project: AGESA
11 * @e sub-project: (Mem/Tech)
12 * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $
13 *
14 **/
15/*
16 *****************************************************************************
17 *
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]20 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +0000[diff] [blame]21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
Frank Vibrans2b4c8312011-02-14 18:30:54 +0000[diff] [blame]30 * from this software without specific prior written permission.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]31 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +0000[diff] [blame]32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]42 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +0000[diff] [blame]43 * ***************************************************************************
44 *
45 */
46
47/*
48 *----------------------------------------------------------------------------
49 * MODULES USED
50 *
51 *----------------------------------------------------------------------------
52 */
53
54
55
56#include "AGESA.h"
57#include "Ids.h"
58#include "mm.h"
59#include "mn.h"
60#include "mu.h"
61#include "mt.h"
62#include "Filecode.h"
63CODE_GROUP (G1_PEICC)
64RDATA_GROUP (G1_PEICC)
65
66#define FILECODE PROC_MEM_TECH_MTHDI_FILECODE
67/*----------------------------------------------------------------------------
68 * DEFINITIONS AND MACROS
69 *
70 *----------------------------------------------------------------------------
71 */
72
73/*----------------------------------------------------------------------------
74 * TYPEDEFS AND STRUCTURES
75 *
76 *----------------------------------------------------------------------------
77 */
78
79/*----------------------------------------------------------------------------
80 * PROTOTYPES OF LOCAL FUNCTIONS
81 *
82 *----------------------------------------------------------------------------
83 */
84
85/*----------------------------------------------------------------------------
86 * EXPORTED FUNCTIONS
87 *
88 *----------------------------------------------------------------------------
89 */
90
91/* -----------------------------------------------------------------------------*/
92/**
93 *
94 * This function initiates Hardware based dram initialization for both DCTs
95 * at the same time.
96 *
97 * @param[in,out] *TechPtr - Pointer to the MEM_TECH_BLOCK
98 *
99 */
100
101VOID
102MemTDramInitHw (
103 IN OUT MEM_TECH_BLOCK *TechPtr
104 )
105{
106 UINT8 Dct;
107 MEM_NB_BLOCK *NBPtr;
108
109 NBPtr = TechPtr->NBPtr;
110
111 NBPtr->BrdcstSet (NBPtr, BFInitDram, 1);
112 // Phy fence training
113 AGESA_TESTPOINT (TpProcMemPhyFenceTraining, &(NBPtr->MemPtr->StdHeader));
114 for (Dct = 0; Dct < NBPtr->DctCount; Dct++) {
115 NBPtr->SwitchDCT (NBPtr, Dct);
116 if (NBPtr->DCTPtr->Timings.DctMemSize != 0) {
117 IDS_HDT_CONSOLE (MEM_STATUS, "\tDct %d\n", Dct);
118 NBPtr->PhyFenceTraining (NBPtr);
119 }
120 }
121}
122
123/*----------------------------------------------------------------------------
124 * LOCAL FUNCTIONS
125 *
126 *----------------------------------------------------------------------------
127 */