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Frank Vibrans2b4c8312011-02-14 18:30:54 +00001/* $NoKeywords:$ */
2/**
3 * @file
4 *
5 * mnmcton.c
6 *
7 * Northbridge ON MCT supporting functions
8 *
9 * @xrefitem bom "File Content Label" "Release Content"
10 * @e project: AGESA
11 * @e sub-project: (Mem/NB/ON)
12 * @e \$Revision: 41275 $ @e \$Date: 2010-11-03 02:14:41 +0800 (Wed, 03 Nov 2010) $
13 *
14 **/
15/*
16 *****************************************************************************
17 *
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +100020 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +000021 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +100028 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
Frank Vibrans2b4c8312011-02-14 18:30:54 +000030 * from this software without specific prior written permission.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +100031 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +000032 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +100042 *
Frank Vibrans2b4c8312011-02-14 18:30:54 +000043 * ***************************************************************************
44 *
45 */
46
47/*
48 *----------------------------------------------------------------------------
49 * MODULES USED
50 *
51 *----------------------------------------------------------------------------
52 */
53
54
55
56#include "AGESA.h"
57#include "amdlib.h"
58#include "Ids.h"
59#include "mport.h"
60#include "mm.h"
61#include "mn.h"
62#include "OptionMemory.h" // need def for MEM_FEAT_BLOCK_NB
63#include "mnon.h"
64#include "mu.h"
65#include "GeneralServices.h"
66#include "Filecode.h"
67#define FILECODE PROC_MEM_NB_ON_MNMCTON_FILECODE
68/*----------------------------------------------------------------------------
69 * DEFINITIONS AND MACROS
70 *
71 *----------------------------------------------------------------------------
72 */
73
74/*----------------------------------------------------------------------------
75 * TYPEDEFS AND STRUCTURES
76 *
77 *----------------------------------------------------------------------------
78 */
79
80/*----------------------------------------------------------------------------
81 * PROTOTYPES OF LOCAL FUNCTIONS
82 *
83 *----------------------------------------------------------------------------
84 */
85
86/*----------------------------------------------------------------------------
87 * EXPORTED FUNCTIONS
88 *
89 *----------------------------------------------------------------------------
90 */
91extern BUILD_OPT_CFG UserOptions;
92/* -----------------------------------------------------------------------------*/
93/**
94 *
95 * This function create the HT memory map
96 *
97 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
98 *
99 * @return TRUE - No fatal error occurs.
100 * @return FALSE - Fatal error occurs.
101 */
102
103BOOLEAN
104MemNHtMemMapInitON (
105 IN OUT MEM_NB_BLOCK *NBPtr
106 )
107{
108 UINT8 WeReMask;
109 UINT32 BottomIo;
110 UINT32 HoleOffset;
111 UINT32 NodeSysBase;
112 UINT32 NodeSysLimit;
113 MEM_PARAMETER_STRUCT *RefPtr;
114 DIE_STRUCT *MCTPtr;
115
116 RefPtr = NBPtr->RefPtr;
117 MCTPtr = NBPtr->MCTPtr;
118 //
119 // Physical addresses in this function are right adjusted by 16 bits ([47:16])
120 // They are BottomIO, HoleOffset, NodeSysBase, NodeSysLimit.
121 //
122
123 // Enforce bottom of IO be be 128MB aligned
124 BottomIo = (RefPtr->BottomIo & 0xF8) << 8;
125
126 NodeSysBase = 0;
127 NodeSysLimit = MCTPtr->NodeMemSize - 1;
128
129 if (NodeSysLimit >= BottomIo) {
130 // HW Dram Remap
131 MCTPtr->Status[SbHWHole] = TRUE;
132 RefPtr->GStatus[GsbHWHole] = TRUE;
133 MCTPtr->NodeHoleBase = BottomIo;
134 RefPtr->HoleBase = BottomIo;
135
136 HoleOffset = _4GB_RJ16 - BottomIo;
137 NodeSysLimit += HoleOffset;
138
139 MemNSetBitFieldNb (NBPtr, BFDramHoleBase, BottomIo >> 8);
140 MemNSetBitFieldNb (NBPtr, BFDramHoleOffset, HoleOffset >> 7);
141 MemNSetBitFieldNb (NBPtr, BFDramHoleValid, 1);
142
143 } else {
144 // No Remapping. Normal Contiguous mapping
145 }
146 MCTPtr->NodeSysBase = NodeSysBase;
147 MCTPtr->NodeSysLimit = NodeSysLimit;
148 RefPtr->SysLimit = MCTPtr->NodeSysLimit;
149
150 WeReMask = 3;
151 // Set the Dram base and set the WE and RE flags in the base.
152 MemNSetBitFieldNb (NBPtr, BFDramBaseReg0, (NodeSysBase << 8) | WeReMask);
153 // Set the Dram limit
154 MemNSetBitFieldNb (NBPtr, BFDramLimitReg0, ((NodeSysLimit << 8) & 0xFFFF0000));
155
156 return (BOOLEAN) (NBPtr->MCTPtr->ErrCode < AGESA_FATAL);
157}
158
159/* -----------------------------------------------------------------------------*/
160/**
161 *
162 *
163 * Report the Uma size that is going to be allocated on Fusion.
164 * Total system memory UMASize
165 * >=2G 384M
166 * >=1G 256M
167 * <1G 64M
168 *
169 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
170 *
171 * @return Uma size [31:0] = Addr [47:16]
172 */
173UINT32
174MemNGetUmaSizeON (
175 IN OUT MEM_NB_BLOCK *NBPtr
176 )
177{
178 UINT32 SysMemSize;
179 UINT32 SizeOfUma;
180
181 SysMemSize = NBPtr->RefPtr->SysLimit + 1;
182 SysMemSize = (SysMemSize + 0x100) & 0xFFFFF000; // Ignore 16MB allocated for C6 when finding UMA size
183 if (SysMemSize >= 0x8000) {
184 SizeOfUma = 384 << (20 - 16);
185 } else if (SysMemSize >= 0x4000) {
186 SizeOfUma = 256 << (20 - 16);
187 } else {
188 SizeOfUma = 64 << (20 - 16);
189 }
190
191 return SizeOfUma;
192}
193
194/* -----------------------------------------------------------------------------*/
195/**
196 *
197 *
198 * This function programs memory prefetch and priority control
199 *
200 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
201 *
202 * @return TRUE - No fatal error occurs.
203 * @return FALSE - Fatal error occurs.
204 */
205
206BOOLEAN
207MemNFinalizeMctON (
208 IN OUT MEM_NB_BLOCK *NBPtr
209 )
210{
211 UINT32 MctCfgLoReg;
212 UINT32 MctCfgHiReg;
213
214 // To support ODTS, with assumption that Tref is set to 7.8us always in AGESA
215 MemNSetBitFieldNb (NBPtr, BFDoubleTrefRateEn, 1);
216
217 MctCfgLoReg = MemNGetBitFieldNb (NBPtr, BFMctCfgLoReg);
218 MemNSetBitFieldNb (NBPtr, BFMctCfgLoReg, (MctCfgLoReg & 0xFFFFF000) | 0x04A4);
219
220 MctCfgHiReg = MemNGetBitFieldNb (NBPtr, BFMctCfgHiReg);
221 MemNSetBitFieldNb (NBPtr, BFMctCfgHiReg, (MctCfgHiReg & 0x9E33AFFF) | 0x00404000);
222
223 // PchgPdTxCClkGateDis is 0 by default
224 // SelCsrPllPdMode and CsrPhySrPllPdMode is 0 by default
225 // SkewMemClk is 0 by default
226
227 //For self-refresh
228 MemNSetBitFieldNb (NBPtr, BFDramSrEn, 1);
229 MemNSetBitFieldNb (NBPtr, BFDramSrHys, 5);
230 if (NBPtr->IsSupported[DramSrHys]) {
231 MemNSetBitFieldNb (NBPtr, BFDramSrHysEn, 1);
232 }
233
234 MemNSetBitFieldNb (NBPtr, BFMemTriStateEn, 1);
235 MemNSetBitFieldNb (NBPtr, BFAcpiPwrStsCtrlHi, MemNGetBitFieldNb (NBPtr, BFAcpiPwrStsCtrlHi) | 0x00060006);
236
237 MemNPhyPowerSavingClientNb (NBPtr);
238
239 // Release NB P-state force
240 MemNSetBitFieldNb (NBPtr, BFNbPsCtrlDis, 0);
241 MemNSetBitFieldNb (NBPtr, BFNbPsForceReq, 0);
242
243 IDS_OPTION_HOOK (IDS_PHY_DLL_STANDBY_CTRL, NBPtr, &NBPtr->MemPtr->StdHeader);
244
245 return (BOOLEAN) (NBPtr->MCTPtr->ErrCode < AGESA_FATAL);
246}
247
248/*----------------------------------------------------------------------------
249 * LOCAL FUNCTIONS
250 *
251 *----------------------------------------------------------------------------
252 */