Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * mmOnlineSpare.c |
| 6 | * |
| 7 | * Main Memory Feature implementation file for Node Interleaving |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: (Mem/Main) |
| 12 | * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ |
| 13 | * |
| 14 | **/ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | /* |
| 48 | *---------------------------------------------------------------------------- |
| 49 | * MODULES USED |
| 50 | * |
| 51 | *---------------------------------------------------------------------------- |
| 52 | */ |
| 53 | |
| 54 | |
| 55 | #include "AGESA.h" |
| 56 | #include "OptionMemory.h" |
| 57 | #include "mm.h" |
| 58 | #include "mn.h" |
| 59 | #include "Ids.h" |
| 60 | #include "Filecode.h" |
| 61 | CODE_GROUP (G2_PEI) |
| 62 | RDATA_GROUP (G2_PEI) |
| 63 | |
| 64 | #define FILECODE PROC_MEM_MAIN_MMONLINESPARE_FILECODE |
| 65 | |
| 66 | /*----------------------------------------------------------------------------- |
| 67 | * EXPORTED FUNCTIONS |
| 68 | * |
| 69 | *----------------------------------------------------------------------------- |
| 70 | */ |
| 71 | |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 72 | BOOLEAN |
| 73 | MemMOnlineSpare ( |
| 74 | IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr |
| 75 | ); |
| 76 | |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 77 | /* -----------------------------------------------------------------------------*/ |
| 78 | /** |
| 79 | * |
| 80 | * Check and enable online spare on all nodes. |
| 81 | * |
| 82 | * @param[in,out] *MemMainPtr - Pointer to the MEM_MAIN_DATA_BLOCK |
| 83 | * |
| 84 | * @return TRUE - No fatal error occurs. |
| 85 | * @return FALSE - Fatal error occurs. |
| 86 | */ |
| 87 | BOOLEAN |
| 88 | MemMOnlineSpare ( |
| 89 | IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr |
| 90 | ) |
| 91 | { |
| 92 | UINT8 Node; |
| 93 | BOOLEAN IsEnabled; |
| 94 | UINT8 FirstEnabledNode; |
| 95 | UINT32 BottomIO; |
| 96 | BOOLEAN RetVal; |
| 97 | MEM_NB_BLOCK *NBPtr; |
| 98 | MEM_PARAMETER_STRUCT *RefPtr; |
| 99 | |
| 100 | AGESA_TESTPOINT (TpProcMemOnlineSpareInit, &(MemMainPtr->MemPtr->StdHeader)); |
| 101 | FirstEnabledNode = 0; |
| 102 | IsEnabled = FALSE; |
| 103 | RetVal = TRUE; |
| 104 | NBPtr = MemMainPtr->NBPtr; |
| 105 | RefPtr = NBPtr[BSP_DIE].RefPtr; |
| 106 | |
| 107 | for (Node = 0; Node < MemMainPtr->DieCount; Node++) { |
| 108 | if (NBPtr[Node].FeatPtr->OnlineSpare (&NBPtr[Node])) { |
| 109 | if (!IsEnabled) { |
| 110 | // Record the first node that has spared dimm enabled |
| 111 | FirstEnabledNode = Node; |
| 112 | IsEnabled = TRUE; |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | if (IsEnabled) { |
| 118 | NBPtr[BSP_DIE].SharedPtr->CurrentNodeSysBase = 0; |
| 119 | BottomIO = (NBPtr[BSP_DIE].RefPtr->BottomIo & 0xF8) << 8; |
| 120 | // If the first node that has spared dimms does not have a system base smaller |
| 121 | // than bottomIO, then we don't need to reset the GStatus, as we don't need to |
| 122 | // remap memory hole. |
| 123 | if (NBPtr[FirstEnabledNode].MCTPtr->NodeSysBase < BottomIO) { |
| 124 | RefPtr->GStatus[GsbHWHole] = FALSE; |
| 125 | RefPtr->GStatus[GsbSpIntRemapHole] = FALSE; |
| 126 | RefPtr->GStatus[GsbSoftHole] = FALSE; |
| 127 | RefPtr->HoleBase = 0; |
| 128 | } |
| 129 | |
| 130 | for (Node = 0; Node < MemMainPtr->DieCount; Node++) { |
| 131 | if (Node >= FirstEnabledNode) { |
| 132 | // Remap memory on nodes with node number larger than the first node that has spared dimms. |
| 133 | NBPtr[Node].MCTPtr->Status[SbHWHole] = FALSE; |
| 134 | NBPtr[Node].MCTPtr->Status[SbSWNodeHole] = FALSE; |
| 135 | NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelBaseAddr, 0); |
| 136 | NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelHiRngEn, 0); |
| 137 | NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelHi, 0); |
| 138 | NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelBaseOffset, 0); |
| 139 | NBPtr[Node].SetBitField (&NBPtr[Node], BFDramHoleAddrReg, 0); |
| 140 | NBPtr[Node].HtMemMapInit (&NBPtr[Node]); |
| 141 | } else { |
| 142 | // No change is needed in the memory map of this node. |
| 143 | // Need to adjust the current system base for other nodes processed later. |
| 144 | NBPtr[Node].SharedPtr->CurrentNodeSysBase = (NBPtr[Node].MCTPtr->NodeSysLimit + 1) & 0xFFFFFFF0; |
| 145 | // If the current node does not have the memory hole, then set DramHoleAddrReg to be 0. |
| 146 | // If memory hoisting is enabled later by other node, SyncAddrMapToAllNodes will set the base |
| 147 | // and DramMemHoistValid. |
| 148 | // Otherwise, do not change the register value, as we need to keep DramHoleOffset unchanged, as well |
| 149 | // DramHoleValid. |
| 150 | if (!NBPtr[Node].MCTPtr->Status[SbHWHole]) { |
| 151 | NBPtr[Node].SetBitField (&NBPtr[Node], BFDramHoleAddrReg, 0); |
| 152 | } |
| 153 | } |
| 154 | } |
| 155 | |
| 156 | for (Node = 0; Node < MemMainPtr->DieCount; Node++) { |
| 157 | NBPtr[Node].SyncAddrMapToAllNodes (&NBPtr[Node]); |
| 158 | RetVal &= (BOOLEAN) (NBPtr[Node].MCTPtr->ErrCode < AGESA_FATAL); |
| 159 | } |
| 160 | NBPtr[BSP_DIE].CpuMemTyping (&NBPtr[BSP_DIE]); |
| 161 | } |
| 162 | return RetVal; |
| 163 | } |