Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * mmNodeInterleave.c |
| 6 | * |
| 7 | * Main Memory Feature implementation file for Node Interleaving |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: (Mem/Main) |
| 12 | * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ |
| 13 | * |
| 14 | **/ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | /* |
| 48 | *---------------------------------------------------------------------------- |
| 49 | * MODULES USED |
| 50 | * |
| 51 | *---------------------------------------------------------------------------- |
| 52 | */ |
| 53 | |
| 54 | |
| 55 | #include "AGESA.h" |
| 56 | #include "OptionMemory.h" |
| 57 | #include "mm.h" |
| 58 | #include "mn.h" |
| 59 | #include "Ids.h" |
| 60 | #include "GeneralServices.h" |
| 61 | #include "Filecode.h" |
| 62 | CODE_GROUP (G2_PEI) |
| 63 | RDATA_GROUP (G2_PEI) |
| 64 | |
| 65 | #define FILECODE PROC_MEM_MAIN_MMNODEINTERLEAVE_FILECODE |
| 66 | |
| 67 | extern MEM_FEAT_BLOCK_MAIN MemFeatMain; |
| 68 | /*----------------------------------------------------------------------------- |
| 69 | * EXPORTED FUNCTIONS |
| 70 | * |
| 71 | *----------------------------------------------------------------------------- |
| 72 | */ |
| 73 | |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 74 | BOOLEAN |
| 75 | MemMInterleaveNodes ( |
| 76 | IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr |
| 77 | ); |
| 78 | |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 79 | /* -----------------------------------------------------------------------------*/ |
| 80 | /** |
| 81 | * |
| 82 | * Check and enable node interleaving on all nodes. |
| 83 | * |
| 84 | * @param[in,out] *MemMainPtr - Pointer to the MEM_MAIN_DATA_BLOCK |
| 85 | * |
| 86 | * @return TRUE - No fatal error occurs. |
| 87 | * @return FALSE - Fatal error occurs. |
| 88 | */ |
| 89 | BOOLEAN |
| 90 | MemMInterleaveNodes ( |
| 91 | IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr |
| 92 | ) |
| 93 | { |
| 94 | UINT8 Node; |
| 95 | UINT8 NodeCnt; |
| 96 | BOOLEAN RetVal; |
| 97 | MEM_NB_BLOCK *NBPtr; |
| 98 | |
| 99 | NBPtr = MemMainPtr->NBPtr; |
| 100 | NodeCnt = 0; |
| 101 | RetVal = TRUE; |
| 102 | |
| 103 | if (NBPtr->RefPtr->EnableNodeIntlv) { |
| 104 | if (!MemFeatMain.MemClr (MemMainPtr)) { |
| 105 | PutEventLog (AGESA_WARNING, MEM_WARNING_NODE_INTERLEAVING_NOT_ENABLED, 0, 0, 0, 0, &NBPtr->MemPtr->StdHeader); |
| 106 | SetMemError (AGESA_WARNING, NBPtr->MCTPtr); |
| 107 | return FALSE; |
| 108 | } |
| 109 | |
| 110 | MemMainPtr->mmSharedPtr->NodeIntlv.IsValid = FALSE; |
| 111 | MemMainPtr->mmSharedPtr->NodeIntlv.NodeIntlvSel = 0; |
| 112 | |
| 113 | for (Node = 0; Node < MemMainPtr->DieCount; Node++) { |
| 114 | if (!NBPtr[Node].FeatPtr->CheckInterleaveNodes (&NBPtr[Node])) { |
| 115 | break; |
| 116 | } |
| 117 | if (NBPtr[Node].MCTPtr->NodeMemSize != 0) { |
| 118 | NodeCnt ++; |
| 119 | } |
| 120 | } |
| 121 | |
| 122 | if ((Node == MemMainPtr->DieCount) && (NodeCnt != 0) && ((NodeCnt & (NodeCnt - 1)) == 0)) { |
| 123 | MemMainPtr->mmSharedPtr->NodeIntlv.NodeCnt = NodeCnt; |
| 124 | for (Node = 0; Node < MemMainPtr->DieCount; Node++) { |
| 125 | if (NBPtr[Node].MCTPtr->NodeMemSize != 0) { |
| 126 | NBPtr[Node].FeatPtr->InterleaveNodes (&NBPtr[Node]); |
| 127 | } |
| 128 | } |
| 129 | for (Node = 0; Node < MemMainPtr->DieCount; Node++) { |
| 130 | NBPtr[Node].SyncAddrMapToAllNodes (&NBPtr[Node]); |
| 131 | RetVal &= (BOOLEAN) (NBPtr[Node].MCTPtr->ErrCode < AGESA_FATAL); |
| 132 | } |
| 133 | } else { |
| 134 | // |
| 135 | // If all nodes cannot be interleaved |
| 136 | // |
| 137 | PutEventLog (AGESA_WARNING, MEM_WARNING_NODE_INTERLEAVING_NOT_ENABLED, 0, 0, 0, 0, &NBPtr->MemPtr->StdHeader); |
| 138 | SetMemError (AGESA_WARNING, NBPtr->MCTPtr); |
| 139 | } |
| 140 | } |
| 141 | |
| 142 | return RetVal; |
| 143 | } |