Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * NB Lclk/Nclk Ratios |
| 6 | * |
| 7 | * |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: GNB |
| 12 | * @e \$Revision: 41658 $ @e \$Date: 2010-11-09 06:39:38 +0800 (Tue, 09 Nov 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | /*---------------------------------------------------------------------------------------- |
| 48 | * M O D U L E S U S E D |
| 49 | *---------------------------------------------------------------------------------------- |
| 50 | */ |
| 51 | |
| 52 | #include "AGESA.h" |
| 53 | #include "amdlib.h" |
| 54 | #include "Ids.h" |
| 55 | #include "heapManager.h" |
| 56 | #include "GnbFuseTable.h" |
| 57 | #include "Gnb.h" |
| 58 | #include GNB_MODULE_DEFINITIONS (GnbCommonLib) |
| 59 | #include "GfxLib.h" |
| 60 | #include "GnbRegistersON.h" |
| 61 | #include "F14NbLclkNclkRatio.h" |
| 62 | #include "Filecode.h" |
| 63 | |
| 64 | #define FILECODE PROC_GNB_NB_FAMILY_0X14_F14NBLCLKNCLKRATIO_FILECODE |
| 65 | /*---------------------------------------------------------------------------------------- |
| 66 | * D E F I N I T I O N S A N D M A C R O S |
| 67 | *---------------------------------------------------------------------------------------- |
| 68 | */ |
| 69 | |
| 70 | typedef struct { |
| 71 | UINT8 NclkDiv; |
| 72 | UINT8 LclkDid; |
| 73 | } NLCK_SCLK; |
| 74 | |
| 75 | |
| 76 | /*----------------------------------------------------------------------------------------*/ |
| 77 | /** |
| 78 | * Power gate unused blocks |
| 79 | * |
| 80 | * |
| 81 | * |
| 82 | * @param[in] Nclk10kHz NCLK |
| 83 | * @param[in] Lclk10kHz LCLK |
| 84 | * @param[in] LclkNclk NCLK/LCLK array |
| 85 | * @retval AGESA_STATUS |
| 86 | */ |
| 87 | |
| 88 | VOID |
| 89 | STATIC |
| 90 | F14NbLclkNclkAllocatePair ( |
| 91 | IN UINT8 NclkDiv, |
| 92 | IN UINT8 LclkDid, |
| 93 | IN OUT NLCK_SCLK *LclkNclk |
| 94 | ) |
| 95 | { |
| 96 | UINTN Index; |
| 97 | for (Index = 0; Index < 8 ; Index++) { |
| 98 | if (LclkNclk[Index].LclkDid == 0 && LclkNclk[Index].NclkDiv == 0) { |
| 99 | LclkNclk[Index].LclkDid = LclkDid; |
| 100 | LclkNclk[Index].NclkDiv = NclkDiv; |
| 101 | break; |
| 102 | } else if (LclkNclk[Index].LclkDid == LclkDid && LclkNclk[Index].NclkDiv == NclkDiv) { |
| 103 | break; |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 104 | } |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 105 | } |
| 106 | } |
| 107 | |
| 108 | /*----------------------------------------------------------------------------------------*/ |
| 109 | /** |
| 110 | * Power gate unused blocks |
| 111 | * |
| 112 | * |
| 113 | * |
| 114 | * @param[in] StdHeader Pointer to Standard configuration |
| 115 | * @retval AGESA_STATUS |
| 116 | */ |
| 117 | |
| 118 | AGESA_STATUS |
| 119 | F14NbLclkNclkRatioFeature ( |
| 120 | IN AMD_CONFIG_PARAMS *StdHeader |
| 121 | ) |
| 122 | { |
| 123 | PP_FUSE_ARRAY *PpFuseArray; |
| 124 | D18F3xD4_STRUCT D18F3xD4; |
| 125 | D18F3xDC_STRUCT D18F3xDC; |
| 126 | D18F6x90_STRUCT D18F6x90; |
| 127 | D18F6x110_STRUCT D18F6x110; |
| 128 | UINT32 MainPllFreq10kHz; |
| 129 | UINT8 NclkDiv[2]; |
| 130 | INT32 Nclk_offset; |
| 131 | INT32 Lclk_offset; |
| 132 | UINT8 Index; |
| 133 | UINT8 LclkIndex; |
| 134 | UINT32 Lclk_period; |
| 135 | UINT32 Nclk_period; |
| 136 | NLCK_SCLK LclkNclk [8]; |
| 137 | IDS_HDT_CONSOLE (GNB_TRACE, "F14NbLclkNclkRatioFeature Enter\n"); |
| 138 | PpFuseArray = (PP_FUSE_ARRAY *) GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader); |
| 139 | ASSERT (PpFuseArray != NULL); |
| 140 | if (PpFuseArray == NULL) { |
| 141 | IDS_HDT_CONSOLE (GNB_TRACE, " ERROR!!! Heap Location\n"); |
| 142 | return AGESA_ERROR; |
| 143 | } |
| 144 | |
| 145 | //main PLL COF in 10kHz |
| 146 | MainPllFreq10kHz = GfxLibGetMainPllFreq (StdHeader) * 100; |
| 147 | |
| 148 | GnbLibPciRead ( |
| 149 | MAKE_SBDFO ( 0, 0, 0x18, 3, D18F3xD4_ADDRESS), |
| 150 | AccessWidth32, |
| 151 | &D18F3xD4.Value, |
| 152 | StdHeader |
| 153 | ); |
| 154 | GnbLibPciRead ( |
| 155 | MAKE_SBDFO ( 0, 0, 0x18, 3, D18F3xDC_ADDRESS), |
| 156 | AccessWidth32, |
| 157 | &D18F3xDC.Value, |
| 158 | StdHeader |
| 159 | ); |
| 160 | GnbLibPciRead ( |
| 161 | MAKE_SBDFO ( 0, 0, 0x18, 6, D18F6x90_ADDRESS), |
| 162 | AccessWidth32, |
| 163 | &D18F6x90.Value, |
| 164 | StdHeader |
| 165 | ); |
| 166 | |
| 167 | NclkDiv[0] = (UINT8) D18F3xDC.Field.NbPs0NclkDiv; |
| 168 | NclkDiv[1] = (UINT8) D18F6x90.Field.NbPs1NclkDiv; |
| 169 | |
| 170 | LibAmdMemFill(&LclkNclk, 0x0, sizeof (LclkNclk), StdHeader); |
| 171 | |
| 172 | for (Index = 0; Index < 2; Index++) { |
| 173 | if (NclkDiv[Index] != 0) { |
| 174 | for (LclkIndex = 0; LclkIndex < 4; LclkIndex++) { |
| 175 | if ((PpFuseArray->LclkDpmValid[LclkIndex] != 0) && (PpFuseArray->LclkDpmDid[LclkIndex] != 0)) { |
| 176 | F14NbLclkNclkAllocatePair (NclkDiv[Index], PpFuseArray->LclkDpmDid[LclkIndex], &LclkNclk[0]); |
| 177 | } |
| 178 | } |
| 179 | } |
| 180 | }; |
| 181 | for (Index = 0; Index < 8; Index++) { |
| 182 | if (LclkNclk[Index].NclkDiv != 0 && LclkNclk[Index].LclkDid != 0) { |
| 183 | UINT32 Nclk10kHz; |
| 184 | UINT32 Lclk10kHz; |
| 185 | Nclk10kHz = GfxLibCalculateNclk (LclkNclk[Index].NclkDiv, MainPllFreq10kHz); |
| 186 | Lclk10kHz = GfxLibCalculateClk (LclkNclk[Index].LclkDid, MainPllFreq10kHz); |
| 187 | IDS_HDT_CONSOLE (GNB_TRACE, " Offset for Nclk = %d Lclk = %d\n", Nclk10kHz / 100, Lclk10kHz / 100); |
| 188 | Lclk_period = 100000000 / Lclk10kHz; |
| 189 | Nclk_period = 100000000 / Nclk10kHz; |
| 190 | |
| 191 | if ((Nclk10kHz * 2) >= Lclk10kHz) { |
| 192 | Nclk_offset = (Nclk_period * 35 - 30110) / (Lclk_period * 10); |
| 193 | Lclk_offset = - 1 - (INT32) ((491 * 10 + Nclk_period * 65 + 3052 * 10 - 1) / (Lclk_period * 10) + 1); |
| 194 | } else { |
| 195 | Nclk_offset = - (INT32) (MIN (2 * (961 * 10 + 175 * Lclk_period + 3011 * 10 - 1) / (Nclk_period * 10) + 1, |
| 196 | 2 * (961 * 10 + 165 * Lclk_period + 3011 * 10 - 1) / (Nclk_period * 10) + 1 + 1)); |
| 197 | Lclk_offset = MAX (2 * (35 * Lclk_period - 3052 * 10) / (Nclk_period * 10), |
| 198 | 2 * (45 * Lclk_period - 3052 * 10) / (Nclk_period * 10) - 1); |
| 199 | } |
| 200 | Nclk_offset = Nclk_offset % 8; |
| 201 | Lclk_offset = Lclk_offset % 8; |
| 202 | |
| 203 | D18F6x110.Field.NclkFreqType = 1; |
| 204 | D18F6x110.Field.NclkFreq = LclkNclk[Index].NclkDiv; |
| 205 | D18F6x110.Field.LclkFreqType = 1; |
| 206 | D18F6x110.Field.LclkFreq = LclkNclk[Index].LclkDid; |
| 207 | D18F6x110.Field.Enable = 1; |
| 208 | D18F6x110.Field.PllMult = D18F3xD4.Field.MainPllOpFreqId + 16; |
| 209 | D18F6x110.Field.LclkFifoOff = Lclk_offset & 0x7; |
| 210 | D18F6x110.Field.NclkFifoOff = Nclk_offset & 0x7; |
| 211 | |
| 212 | GnbLibPciWrite ( |
| 213 | MAKE_SBDFO ( 0, 0, 0x18, 6, D18F6x110_ADDRESS + Index * 4), |
| 214 | AccessS3SaveWidth32, |
| 215 | &D18F6x110.Value, |
| 216 | StdHeader |
| 217 | ); |
| 218 | } |
| 219 | } |
| 220 | IDS_HDT_CONSOLE (GNB_TRACE, "F14NbLclkNclkRatioFeature Exit\n"); |
| 221 | return AGESA_SUCCESS; |
| 222 | } |