Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * GNB-SB link procedure |
| 6 | * |
| 7 | * |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: GNB |
| 12 | * @e \$Revision: 38931 $ @e \$Date: 2010-10-01 15:50:05 -0700 (Fri, 01 Oct 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | /*---------------------------------------------------------------------------------------- |
| 48 | * M O D U L E S U S E D |
| 49 | *---------------------------------------------------------------------------------------- |
| 50 | */ |
| 51 | #include "AGESA.h" |
| 52 | #include "Ids.h" |
| 53 | #include "amdlib.h" |
| 54 | #include "Gnb.h" |
| 55 | #include "GnbPcie.h" |
| 56 | #include GNB_MODULE_DEFINITIONS (GnbCommonLib) |
| 57 | #include GNB_MODULE_DEFINITIONS (GnbPcieInitLibV1) |
| 58 | #include "GnbRegistersON.h" |
| 59 | #include "Filecode.h" |
| 60 | #define FILECODE PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIESBLINK_FILECODE |
| 61 | /*---------------------------------------------------------------------------------------- |
| 62 | * D E F I N I T I O N S A N D M A C R O S |
| 63 | *---------------------------------------------------------------------------------------- |
| 64 | */ |
| 65 | |
| 66 | |
| 67 | /*---------------------------------------------------------------------------------------- |
| 68 | * T Y P E D E F S A N D S T R U C T U R E S |
| 69 | *---------------------------------------------------------------------------------------- |
| 70 | */ |
| 71 | |
| 72 | |
| 73 | /*---------------------------------------------------------------------------------------- |
| 74 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 75 | *---------------------------------------------------------------------------------------- |
| 76 | */ |
| 77 | |
| 78 | /*----------------------------------------------------------------------------------------*/ |
| 79 | /** |
| 80 | * Enable/Disable ASPM on GNB-SB link |
| 81 | * |
| 82 | * |
| 83 | * |
| 84 | * @param[in] Engine Pointer to engine config descriptor |
| 85 | * @param[in] Pcie Pointer to global PCIe configuration |
| 86 | * |
| 87 | */ |
| 88 | |
| 89 | AGESA_STATUS |
| 90 | PcieSbLinkAspmControl ( |
| 91 | IN PCIe_ENGINE_CONFIG *Engine, |
| 92 | IN PCIe_PLATFORM_CONFIG *Pcie |
| 93 | ) |
| 94 | { |
| 95 | AGESA_STATUS Status; |
| 96 | UINT8 NbAspm; |
| 97 | |
| 98 | Status = PcieSbInitAspm (Engine->Type.Port.PortData.LinkAspm, GnbLibGetHeader (Pcie)); |
| 99 | if (Status != AGESA_SUCCESS) { |
| 100 | return AGESA_UNSUPPORTED; |
| 101 | } |
| 102 | |
| 103 | NbAspm = Engine->Type.Port.PortData.LinkAspm; |
| 104 | |
| 105 | PcieNbAspmEnable (Engine->Type.Port.Address, NbAspm, GnbLibGetHeader (Pcie)); |
| 106 | return AGESA_SUCCESS; |
| 107 | } |
| 108 | |
| 109 | /*----------------------------------------------------------------------------------------*/ |
| 110 | /** |
| 111 | * Init SB ASPM. |
| 112 | * Enable ASPM states on SB |
| 113 | * |
| 114 | * |
| 115 | * @param[in] Aspm ASPM bitmap. |
| 116 | * @param[in] StdHeader Standard configuration header |
| 117 | */ |
| 118 | /*----------------------------------------------------------------------------------------*/ |
| 119 | |
| 120 | AGESA_STATUS |
| 121 | PcieSbInitAspm ( |
| 122 | IN PCIE_ASPM_TYPE Aspm, |
| 123 | IN AMD_CONFIG_PARAMS *StdHeader |
| 124 | ) |
| 125 | { |
| 126 | AGESA_STATUS Status; |
| 127 | UINT16 AlinkPort; |
| 128 | |
| 129 | Status = PcieSbAgetAlinkIoAddress (&AlinkPort, StdHeader); |
| 130 | if (Status != AGESA_SUCCESS) { |
| 131 | return Status; |
| 132 | } |
| 133 | GnbLibIoRMW (AlinkPort, AccessS3SaveWidth32, 0x0, 0x40000038, StdHeader); |
| 134 | GnbLibIoRMW (AlinkPort + 4, AccessS3SaveWidth32, 0x0, 0xA0, StdHeader); |
| 135 | GnbLibIoRMW (AlinkPort, AccessS3SaveWidth32, 0x0, 0x4000003c, StdHeader); |
| 136 | GnbLibIoRMW (AlinkPort + 4, AccessS3SaveWidth32, 0xffff00ff, 0x6900, StdHeader); |
| 137 | GnbLibIoRMW (AlinkPort, AccessS3SaveWidth32, 0x0, 0x80000068, StdHeader); |
| 138 | GnbLibIoRMW (AlinkPort + 4, AccessS3SaveWidth32, 0xfffffffc, Aspm, StdHeader); |
| 139 | return AGESA_SUCCESS; |
| 140 | } |
| 141 | |
| 142 | /*----------------------------------------------------------------------------------------*/ |
| 143 | /** |
| 144 | * Get Alink config address |
| 145 | * |
| 146 | * |
| 147 | */ |
| 148 | /*----------------------------------------------------------------------------------------*/ |
| 149 | |
| 150 | AGESA_STATUS |
| 151 | PcieSbAgetAlinkIoAddress ( |
| 152 | OUT UINT16 *AlinkPort, |
| 153 | IN AMD_CONFIG_PARAMS *StdHeader |
| 154 | ) |
| 155 | { |
| 156 | UINT8 AlinkPortIndex; |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 157 | if (AlinkPort == NULL) { |
| 158 | return AGESA_UNSUPPORTED; |
| 159 | } |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 160 | AlinkPortIndex = 0xE0; |
| 161 | GnbLibIoWrite (0xCD6, AccessWidth8, &AlinkPortIndex, StdHeader); |
| 162 | GnbLibIoRead (0xCD7, AccessWidth8, AlinkPort, StdHeader); |
| 163 | AlinkPortIndex = 0xE1; |
| 164 | GnbLibIoWrite (0xCD6, AccessWidth8, &AlinkPortIndex, StdHeader); |
| 165 | GnbLibIoRead (0xCD7, AccessWidth8, (VOID*) ((UINT8*) AlinkPort + 1), StdHeader); |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 166 | // if (&AlinkPort == 0) { |
| 167 | // return AGESA_UNSUPPORTED; |
| 168 | // } |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 169 | return AGESA_SUCCESS; |
| 170 | } |
| 171 | |
| 172 | /*----------------------------------------------------------------------------------------*/ |
| 173 | /** |
| 174 | * Set ASMP State on PCIe device function |
| 175 | * |
| 176 | * |
| 177 | * |
| 178 | * @param[in] Function PCI address of function. |
| 179 | * @param[in] Aspm ASPM bitmap. |
| 180 | * @param[in] StdHeader Standard configuration header |
| 181 | * |
| 182 | */ |
| 183 | /*----------------------------------------------------------------------------------------*/ |
| 184 | |
| 185 | VOID |
| 186 | PcieNbAspmEnable ( |
| 187 | IN PCI_ADDR Function, |
| 188 | IN PCIE_ASPM_TYPE Aspm, |
| 189 | IN AMD_CONFIG_PARAMS *StdHeader |
| 190 | ) |
| 191 | { |
| 192 | UINT8 PcieCapPtr; |
| 193 | PcieCapPtr = GnbLibFindPciCapability (Function.AddressValue, PCIE_CAP_ID, StdHeader); |
| 194 | if (PcieCapPtr != 0) { |
| 195 | GnbLibPciRMW ( |
| 196 | Function.AddressValue | (PcieCapPtr + PCIE_LINK_CTRL_REGISTER) , |
| 197 | AccessS3SaveWidth8, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 198 | ~(UINT32)(BIT0 | BIT1), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 199 | Aspm, |
| 200 | StdHeader |
| 201 | ); |
| 202 | } |
| 203 | } |
| 204 | |
| 205 | /*----------------------------------------------------------------------------------------*/ |
| 206 | /** |
| 207 | * Enable VC on GNB-SB link |
| 208 | * |
| 209 | * |
| 210 | * |
| 211 | * @param[in] Engine Pointer to engine config descriptor |
| 212 | * @param[in] Pcie Pointer to global PCIe configuration |
| 213 | * |
| 214 | */ |
| 215 | |
| 216 | VOID |
| 217 | PcieSbLinkVcEnable ( |
| 218 | IN PCIe_ENGINE_CONFIG *Engine, |
| 219 | IN PCIe_PLATFORM_CONFIG *Pcie |
| 220 | ) |
| 221 | { |
| 222 | |
| 223 | } |
| 224 | |