Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * GNB function to create/locate PCIe configuration data area |
| 6 | * |
| 7 | * Contain code that create/locate and rebase configuration data area. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: GNB |
| 12 | * @e \$Revision: 39898 $ @e \$Date: 2010-10-15 17:08:45 -0400 (Fri, 15 Oct 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | /*---------------------------------------------------------------------------------------- |
| 48 | * M O D U L E S U S E D |
| 49 | *---------------------------------------------------------------------------------------- |
| 50 | */ |
| 51 | #include "AGESA.h" |
| 52 | #include "Ids.h" |
| 53 | #include "amdlib.h" |
| 54 | #include "Gnb.h" |
| 55 | #include "GnbPcie.h" |
| 56 | #include "GnbPcieFamServices.h" |
| 57 | #include GNB_MODULE_DEFINITIONS (GnbCommonLib) |
| 58 | #include GNB_MODULE_DEFINITIONS (GnbPcieConfig) |
| 59 | #include "PcieMapTopology.h" |
| 60 | #include "Filecode.h" |
| 61 | #define FILECODE PROC_GNB_MODULES_GNBPCIECONFIG_PCIECONFIGLIB_FILECODE |
| 62 | /*---------------------------------------------------------------------------------------- |
| 63 | * D E F I N I T I O N S A N D M A C R O S |
| 64 | *---------------------------------------------------------------------------------------- |
| 65 | */ |
| 66 | |
| 67 | |
| 68 | /*---------------------------------------------------------------------------------------- |
| 69 | * T Y P E D E F S A N D S T R U C T U R E S |
| 70 | *---------------------------------------------------------------------------------------- |
| 71 | */ |
| 72 | |
| 73 | |
| 74 | /*---------------------------------------------------------------------------------------- |
| 75 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 76 | *---------------------------------------------------------------------------------------- |
| 77 | */ |
| 78 | |
| 79 | /*----------------------------------------------------------------------------------------*/ |
| 80 | /** |
| 81 | * Get number of core lanes |
| 82 | * |
| 83 | * |
| 84 | * |
| 85 | * @param[in] Engine Pointer to engine descriptor |
| 86 | * @retval Number of core lane |
| 87 | */ |
| 88 | UINT8 |
| 89 | PcieConfigGetNumberOfCoreLane ( |
| 90 | IN PCIe_ENGINE_CONFIG *Engine |
| 91 | ) |
| 92 | { |
| 93 | if (Engine->Type.Port.StartCoreLane >= UNUSED_LANE_ID || Engine->Type.Port.EndCoreLane >= UNUSED_LANE_ID) { |
| 94 | return 0; |
| 95 | } |
| 96 | return (UINT8) (Engine->Type.Port.EndCoreLane - Engine->Type.Port.StartCoreLane + 1); |
| 97 | } |
| 98 | |
| 99 | /*----------------------------------------------------------------------------------------*/ |
| 100 | /** |
| 101 | * Disable engine |
| 102 | * |
| 103 | * |
| 104 | * |
| 105 | * @param[in] Engine Pointer to engine config descriptor |
| 106 | */ |
| 107 | VOID |
| 108 | PcieConfigDisableEngine ( |
| 109 | IN PCIe_ENGINE_CONFIG *Engine |
| 110 | ) |
| 111 | { |
| 112 | if (Engine->Type.Port.IsSB) { |
| 113 | return; |
| 114 | } |
| 115 | Engine->Flags &= ~DESCRIPTOR_ALLOCATED; |
| 116 | } |
| 117 | |
| 118 | |
| 119 | /*----------------------------------------------------------------------------------------*/ |
| 120 | /** |
| 121 | * Disable all engines on wrapper |
| 122 | * |
| 123 | * |
| 124 | * |
| 125 | * @param[in] EngineTypeMask Engine type bitmap. |
| 126 | * @param[in] Wrapper Pointer to wrapper config descriptor |
| 127 | */ |
| 128 | VOID |
| 129 | PcieConfigDisableAllEngines ( |
| 130 | IN UINTN EngineTypeMask, |
| 131 | IN PCIe_WRAPPER_CONFIG *Wrapper |
| 132 | ) |
| 133 | { |
| 134 | PCIe_ENGINE_CONFIG *EngineList; |
| 135 | EngineList = PcieWrapperGetEngineList (Wrapper); |
| 136 | while (EngineList != NULL) { |
| 137 | if ((EngineList->EngineData.EngineType & EngineTypeMask) != 0) { |
| 138 | PcieConfigDisableEngine (EngineList); |
| 139 | } |
| 140 | EngineList = PcieLibGetNextDescriptor (EngineList); |
| 141 | } |
| 142 | } |
| 143 | |
| 144 | |
| 145 | /*----------------------------------------------------------------------------------------*/ |
| 146 | /** |
| 147 | * Get engine PHY lanes bitmap |
| 148 | * |
| 149 | * |
| 150 | * |
| 151 | * @param[in] Engine Pointer to engine config descriptor |
| 152 | */ |
| 153 | UINT32 |
| 154 | PcieConfigGetEnginePhyLaneBitMap ( |
| 155 | IN PCIe_ENGINE_CONFIG *Engine |
| 156 | ) |
| 157 | { |
| 158 | UINT32 LaneBitMap; |
| 159 | LaneBitMap = 0; |
| 160 | if (PcieLibIsEngineAllocated (Engine)) { |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 161 | LaneBitMap = ((1 << PcieConfigGetNumberOfPhyLane (Engine)) - 1) << (PcieLibGetLoPhyLane (Engine) - PcieEngineGetParentWrapper (Engine)->StartPhyLane); |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 162 | } |
| 163 | return LaneBitMap; |
| 164 | } |
| 165 | |
| 166 | |
| 167 | /*----------------------------------------------------------------------------------------*/ |
| 168 | /** |
| 169 | * Get number of phy lanes |
| 170 | * |
| 171 | * |
| 172 | * |
| 173 | * @param[in] Engine Pointer to engine config descriptor |
| 174 | * @retval Number of Phy lane |
| 175 | */ |
| 176 | UINT8 |
| 177 | PcieConfigGetNumberOfPhyLane ( |
| 178 | IN PCIe_ENGINE_CONFIG *Engine |
| 179 | ) |
| 180 | { |
Elyes HAOUAS | d844431 | 2019-06-10 13:47:56 +0200 | [diff] [blame] | 181 | if (Engine->EngineData.StartLane >= UNUSED_LANE_ID || Engine->EngineData.EndLane >= UNUSED_LANE_ID) { |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 182 | return 0; |
| 183 | } |
| 184 | if (Engine->EngineData.StartLane > Engine->EngineData.EndLane) { |
| 185 | return (UINT8) (Engine->EngineData.StartLane - Engine->EngineData.EndLane + 1); |
| 186 | } else { |
| 187 | return (UINT8) (Engine->EngineData.EndLane - Engine->EngineData.StartLane + 1); |
| 188 | } |
| 189 | } |
| 190 | |
| 191 | /*----------------------------------------------------------------------------------------*/ |
| 192 | /** |
| 193 | * Get port configuration signature for given wrapper and core |
| 194 | * |
| 195 | * Support for unify register access through index/data pair on GNB |
| 196 | * |
| 197 | * @param[in] Wrapper Pointer to wrapper config descriptor |
| 198 | * @param[in] CoreId Core ID |
| 199 | * @retval Configuration Signature |
| 200 | */ |
| 201 | UINT64 |
| 202 | PcieConfigGetConfigurationSignature ( |
| 203 | IN PCIe_WRAPPER_CONFIG *Wrapper, |
| 204 | IN UINT8 CoreId |
| 205 | ) |
| 206 | { |
| 207 | UINT64 ConfigurationSignature; |
| 208 | PCIe_ENGINE_CONFIG *EngineList; |
| 209 | ConfigurationSignature = 0; |
| 210 | EngineList = PcieWrapperGetEngineList (Wrapper); |
| 211 | while (EngineList != NULL) { |
| 212 | if (EngineList->Type.Port.CoreId == CoreId) { |
| 213 | ConfigurationSignature = (ConfigurationSignature << 8) | PcieConfigGetNumberOfCoreLane (EngineList); |
| 214 | } |
| 215 | EngineList = PcieLibGetNextDescriptor (EngineList); |
| 216 | } |
| 217 | return ConfigurationSignature; |
| 218 | } |
| 219 | |
| 220 | /*----------------------------------------------------------------------------------------*/ |
| 221 | /** |
| 222 | * Check Port Status |
| 223 | * |
| 224 | * |
| 225 | * |
| 226 | * @param[in] Engine Pointer to engine config descriptor |
| 227 | * @param[in] PortStatus Check if status asserted for port |
| 228 | * @retval TRUE if status asserted |
| 229 | */ |
| 230 | BOOLEAN |
| 231 | PcieConfigCheckPortStatus ( |
| 232 | IN PCIe_ENGINE_CONFIG *Engine, |
| 233 | IN UINT32 PortStatus |
| 234 | ) |
| 235 | { |
| 236 | return (Engine->InitStatus & PortStatus) == 0 ? FALSE : TRUE; |
| 237 | } |
| 238 | |
| 239 | /*----------------------------------------------------------------------------------------*/ |
| 240 | /** |
| 241 | * Set/Reset port status |
| 242 | * |
| 243 | * |
| 244 | * |
| 245 | * @param[in] Engine Pointer to engine config descriptor |
| 246 | * @param[in] SetStatus SetStatus |
| 247 | * @param[in] ResetStatus ResetStatus |
| 248 | * |
| 249 | */ |
| 250 | UINT32 |
| 251 | PcieConfigUpdatePortStatus ( |
| 252 | IN PCIe_ENGINE_CONFIG *Engine, |
| 253 | IN UINT32 SetStatus, |
| 254 | IN UINT32 ResetStatus |
| 255 | ) |
| 256 | { |
| 257 | Engine->InitStatus |= SetStatus; |
| 258 | Engine->InitStatus &= (~ResetStatus); |
| 259 | return Engine->InitStatus; |
| 260 | } |
| 261 | |
| 262 | |
| 263 | /*----------------------------------------------------------------------------------------*/ |
| 264 | /** |
| 265 | * Execute callback on all engine in topology |
| 266 | * |
| 267 | * |
| 268 | * @param[in] DescriptorFlags Wrapper Flags |
| 269 | * @param[in] Callback Pointer to callback function |
| 270 | * @param[in, out] Buffer Pointer to buffer to pass information to callback |
| 271 | * @param[in] Pcie Pointer to global PCIe configuration |
| 272 | */ |
| 273 | |
| 274 | AGESA_STATUS |
| 275 | PcieConfigRunProcForAllWrappers ( |
| 276 | IN UINT32 DescriptorFlags, |
| 277 | IN PCIe_RUN_ON_WRAPPER_CALLBACK Callback, |
| 278 | IN OUT VOID *Buffer, |
| 279 | IN PCIe_PLATFORM_CONFIG *Pcie |
| 280 | ) |
| 281 | { |
| 282 | AGESA_STATUS AgesaStatus; |
| 283 | AGESA_STATUS Status; |
| 284 | PCIe_COMPLEX_CONFIG *Complex; |
| 285 | AgesaStatus = AGESA_SUCCESS; |
| 286 | Complex = Pcie->ComplexList; |
| 287 | while (Complex != NULL) { |
| 288 | PCIe_SILICON_CONFIG *Silicon; |
| 289 | Silicon = PcieComplexGetSiliconList (Complex); |
| 290 | while (Silicon != NULL) { |
| 291 | PCIe_WRAPPER_CONFIG *Wrapper; |
| 292 | Wrapper = PcieSiliconGetWrapperList (Silicon); |
| 293 | while (Wrapper != NULL) { |
| 294 | if (!(PcieLibIsVirtualDesciptor (Wrapper) && (DescriptorFlags & DESCRIPTOR_VIRTUAL) == 0)) { |
| 295 | if ((DescriptorFlags & DESCRIPTOR_ALL_WRAPPERS & Wrapper->Flags) != 0) { |
| 296 | Status = Callback (Wrapper, Buffer, Pcie); |
| 297 | AGESA_STATUS_UPDATE (Status, AgesaStatus); |
| 298 | } |
| 299 | } |
| 300 | Wrapper = PcieLibGetNextDescriptor (Wrapper); |
| 301 | } |
| 302 | Silicon = PcieLibGetNextDescriptor (Silicon); |
| 303 | } |
| 304 | Complex = PcieLibGetNextDescriptor (Complex); |
| 305 | } |
| 306 | return AgesaStatus; |
| 307 | } |
| 308 | |
| 309 | |
| 310 | /*----------------------------------------------------------------------------------------*/ |
| 311 | /** |
| 312 | * Execute callback on all engine in topology |
| 313 | * |
| 314 | * |
| 315 | * @param[in] DescriptorFlags Engine flags. |
| 316 | * @param[in] Callback Pointer to callback function |
| 317 | * @param[in, out] Buffer Pointer to buffer to pass information to callback |
| 318 | * @param[in] Pcie Pointer to global PCIe configuration |
| 319 | */ |
| 320 | |
| 321 | VOID |
| 322 | PcieConfigRunProcForAllEngines ( |
| 323 | IN UINT32 DescriptorFlags, |
| 324 | IN PCIe_RUN_ON_ENGINE_CALLBACK Callback, |
| 325 | IN OUT VOID *Buffer, |
| 326 | IN PCIe_PLATFORM_CONFIG *Pcie |
| 327 | ) |
| 328 | { |
| 329 | PCIe_COMPLEX_CONFIG *Complex; |
| 330 | Complex = Pcie->ComplexList; |
| 331 | while (Complex != NULL) { |
| 332 | PCIe_SILICON_CONFIG *Silicon; |
| 333 | Silicon = PcieComplexGetSiliconList (Complex); |
| 334 | while (Silicon != NULL) { |
| 335 | PCIe_WRAPPER_CONFIG *Wrapper; |
| 336 | Wrapper = PcieSiliconGetWrapperList (Silicon); |
| 337 | while (Wrapper != NULL) { |
| 338 | PCIe_ENGINE_CONFIG *Engine; |
| 339 | Engine = PcieWrapperGetEngineList (Wrapper); |
| 340 | while (Engine != NULL) { |
| 341 | if (!(PcieLibIsVirtualDesciptor (Engine) && (DescriptorFlags & DESCRIPTOR_VIRTUAL) == 0)) { |
| 342 | if (!((DescriptorFlags & DESCRIPTOR_ALLOCATED) != 0 && !PcieLibIsEngineAllocated (Engine))) { |
| 343 | if ((Engine->Flags & DESCRIPTOR_ALL_ENGINES & DescriptorFlags) != 0) { |
| 344 | Callback (Engine, Buffer, Pcie); |
| 345 | } |
| 346 | } |
| 347 | } |
| 348 | Engine = PcieLibGetNextDescriptor (Engine); |
| 349 | } |
| 350 | Wrapper = PcieLibGetNextDescriptor (Wrapper); |
| 351 | } |
| 352 | Silicon = PcieLibGetNextDescriptor (Silicon); |
| 353 | } |
| 354 | Complex = PcieLibGetNextDescriptor (Complex); |
| 355 | } |
| 356 | } |