Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * AMD AGESA Basic Level Public APIs |
| 6 | * |
| 7 | * Contains basic Level Initialization routines. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: Interface |
| 12 | * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | |
| 48 | /*---------------------------------------------------------------------------------------- |
| 49 | * M O D U L E S U S E D |
| 50 | *---------------------------------------------------------------------------------------- |
| 51 | */ |
| 52 | #include "AGESA.h" |
| 53 | #include "amdlib.h" |
| 54 | #include "Ids.h" |
| 55 | #include "OptionDmi.h" |
| 56 | #include "OptionSlit.h" |
| 57 | #include "cpuLateInit.h" |
| 58 | #include "cpuFeatures.h" |
| 59 | #include "CommonInits.h" |
| 60 | #include "GnbInterface.h" |
| 61 | #include "OptionPstate.h" |
| 62 | #include "Filecode.h" |
| 63 | CODE_GROUP (G3_DXE) |
| 64 | RDATA_GROUP (G3_DXE) |
| 65 | |
| 66 | #define FILECODE PROC_COMMON_AMDINITLATE_FILECODE |
| 67 | /*---------------------------------------------------------------------------------------- |
| 68 | * D E F I N I T I O N S A N D M A C R O S |
| 69 | *---------------------------------------------------------------------------------------- |
| 70 | */ |
| 71 | extern OPTION_DMI_CONFIGURATION OptionDmiConfiguration; // global user config record |
| 72 | extern OPTION_SLIT_CONFIGURATION OptionSlitConfiguration; // global user config record |
| 73 | extern OPTION_PSTATE_LATE_CONFIGURATION OptionPstateLateConfiguration; |
| 74 | |
| 75 | /*---------------------------------------------------------------------------------------- |
| 76 | * T Y P E D E F S A N D S T R U C T U R E S |
| 77 | *---------------------------------------------------------------------------------------- |
| 78 | */ |
| 79 | |
| 80 | |
| 81 | /*---------------------------------------------------------------------------------------- |
| 82 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 83 | *---------------------------------------------------------------------------------------- |
| 84 | */ |
| 85 | |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 86 | AGESA_STATUS |
| 87 | AmdLatePlatformConfigInit ( |
| 88 | IN OUT PLATFORM_CONFIGURATION *PlatformConfig, |
| 89 | IN OUT AMD_CONFIG_PARAMS *StdHeader |
| 90 | ); |
| 91 | |
| 92 | AGESA_STATUS |
| 93 | AmdInitLateInitializer ( |
| 94 | IN AMD_CONFIG_PARAMS *StdHeader, |
| 95 | IN OUT AMD_LATE_PARAMS *LateParamsPtr |
| 96 | ); |
| 97 | |
| 98 | AGESA_STATUS |
| 99 | AmdInitLateDestructor ( |
| 100 | IN AMD_CONFIG_PARAMS *StdHeader, |
| 101 | IN AMD_LATE_PARAMS *LateParamsPtr |
| 102 | ); |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 103 | |
| 104 | /*---------------------------------------------------------------------------------------- |
| 105 | * E X P O R T E D F U N C T I O N S |
| 106 | *---------------------------------------------------------------------------------------- |
| 107 | */ |
| 108 | extern BUILD_OPT_CFG UserOptions; |
| 109 | |
| 110 | /*------------------------------------------------------------------------------------*/ |
| 111 | /** |
| 112 | * Initialize AmdInitLate stage platform profile and user option input. |
| 113 | * |
| 114 | * @param[in,out] PlatformConfig Platform profile/build option config structure |
| 115 | * @param[in,out] StdHeader AMD standard header config param |
| 116 | * |
| 117 | * @retval AGESA_SUCCESS Always Succeeds. |
| 118 | * |
| 119 | */ |
| 120 | AGESA_STATUS |
| 121 | AmdLatePlatformConfigInit ( |
| 122 | IN OUT PLATFORM_CONFIGURATION *PlatformConfig, |
| 123 | IN OUT AMD_CONFIG_PARAMS *StdHeader |
| 124 | ) |
| 125 | { |
| 126 | CommonPlatformConfigInit (PlatformConfig, StdHeader); |
| 127 | |
| 128 | return AGESA_SUCCESS; |
| 129 | } |
| 130 | |
| 131 | /* |
| 132 | *--------------------------------------------------------------------------------------- |
| 133 | * |
| 134 | * AmdInitLateInitializer |
| 135 | * |
| 136 | * Initializer routine that will be invoked by the wrapper |
| 137 | * to initialize the input structure for the AmdInitLate |
| 138 | * |
| 139 | * @param[in, out] IN OUT AMD_LATE_PARAMS *LateParamsPtr |
| 140 | * |
| 141 | * @retval AGESA_STATUS |
| 142 | * |
| 143 | *--------------------------------------------------------------------------------------- |
| 144 | */ |
| 145 | AGESA_STATUS |
| 146 | AmdInitLateInitializer ( |
| 147 | IN AMD_CONFIG_PARAMS *StdHeader, |
| 148 | IN OUT AMD_LATE_PARAMS *LateParamsPtr |
| 149 | ) |
| 150 | { |
| 151 | ASSERT (StdHeader != NULL); |
| 152 | ASSERT (LateParamsPtr != NULL); |
| 153 | |
| 154 | LateParamsPtr->StdHeader = *StdHeader; |
| 155 | |
| 156 | AmdLatePlatformConfigInit (&LateParamsPtr->PlatformConfig, &LateParamsPtr->StdHeader); |
| 157 | |
| 158 | LateParamsPtr->AcpiSlit = NULL; |
| 159 | |
| 160 | LateParamsPtr->AcpiSrat = NULL; |
| 161 | |
| 162 | LateParamsPtr->AcpiWheaMce = NULL; |
| 163 | LateParamsPtr->AcpiWheaCmc = NULL; |
| 164 | |
| 165 | LateParamsPtr->AcpiPState = NULL; |
| 166 | |
| 167 | LateParamsPtr->DmiTable = NULL; |
| 168 | |
| 169 | LateParamsPtr->AcpiAlib = NULL; |
| 170 | |
| 171 | return AGESA_SUCCESS; |
| 172 | } |
| 173 | |
| 174 | /* |
| 175 | *--------------------------------------------------------------------------------------- |
| 176 | * |
| 177 | * AmdInitLateDestructor |
| 178 | * |
| 179 | * Destruct routine that provide a chance if something need to be done |
| 180 | * before the end of AmdInitLate. |
| 181 | * |
| 182 | * @param[in] StdHeader The standard header. |
| 183 | * @param[in] LateParamsPtr AMD init late param. |
| 184 | * |
| 185 | * @retval AGESA_STATUS |
| 186 | * |
| 187 | *--------------------------------------------------------------------------------------- |
| 188 | */ |
| 189 | AGESA_STATUS |
| 190 | AmdInitLateDestructor ( |
| 191 | IN AMD_CONFIG_PARAMS *StdHeader, |
| 192 | IN AMD_LATE_PARAMS *LateParamsPtr |
| 193 | ) |
| 194 | { |
| 195 | |
| 196 | ASSERT (LateParamsPtr != NULL); |
| 197 | |
| 198 | (*(OptionDmiConfiguration.DmiReleaseBuffer)) (StdHeader); |
| 199 | (*(OptionSlitConfiguration.SlitReleaseBuffer)) (StdHeader); |
| 200 | |
| 201 | return AGESA_SUCCESS; |
| 202 | } |
| 203 | |
| 204 | /*---------------------------------------------------------------------------------------*/ |
| 205 | /** |
| 206 | * Main entry point for the AMD_INIT_LATE function. |
| 207 | * |
| 208 | * This entry point is responsible for creating any desired ACPI tables, providing |
| 209 | * information for DMI, and to prepare the processors for the operating system |
| 210 | * bootstrap load process. |
| 211 | * |
| 212 | * @param[in,out] LateParams Required input parameters for the AMD_INIT_LATE |
| 213 | * entry point. |
| 214 | * |
| 215 | * @return Aggregated status across all internal AMD late calls invoked. |
| 216 | * |
| 217 | */ |
| 218 | AGESA_STATUS |
| 219 | AmdInitLate ( |
| 220 | IN OUT AMD_LATE_PARAMS *LateParams |
| 221 | ) |
| 222 | { |
| 223 | AGESA_STATUS AgesaStatus; |
| 224 | AGESA_STATUS AmdInitLateStatus; |
| 225 | IDS_HDT_CONSOLE (MAIN_FLOW, "AmdInitLate: Start\n\n"); |
| 226 | AGESA_TESTPOINT (TpIfAmdInitLateEntry, &LateParams->StdHeader); |
| 227 | IDS_PERF_TIME_MEASURE (&LateParams->StdHeader); |
| 228 | |
| 229 | ASSERT (LateParams != NULL); |
| 230 | AmdInitLateStatus = AGESA_SUCCESS; |
| 231 | |
| 232 | IDS_OPTION_HOOK (IDS_INIT_LATE_BEFORE, LateParams, &LateParams->StdHeader); |
| 233 | |
| 234 | IDS_HDT_CONSOLE (MAIN_FLOW, "CreatSystemTable: Start\n"); |
| 235 | // _PSS, XPSS, _PCT, _PSD, _PPC, _CST, _CSD Tables |
| 236 | if ((LateParams->PlatformConfig.UserOptionPState) || (IsFeatureEnabled (IoCstate, &LateParams->PlatformConfig, &LateParams->StdHeader))) { |
| 237 | AgesaStatus = ((*(OptionPstateLateConfiguration.SsdtFeature)) (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiPState)); |
| 238 | if (AgesaStatus > AmdInitLateStatus) { |
| 239 | AmdInitLateStatus = AgesaStatus; |
| 240 | } |
| 241 | } |
| 242 | |
| 243 | // SRAT Table Generation |
| 244 | if (LateParams->PlatformConfig.UserOptionSrat) { |
| 245 | AgesaStatus = CreateAcpiSrat (&LateParams->StdHeader, &LateParams->AcpiSrat); |
| 246 | if (AgesaStatus > AmdInitLateStatus) { |
| 247 | AmdInitLateStatus = AgesaStatus; |
| 248 | } |
| 249 | } |
| 250 | |
| 251 | // SLIT Table Generation |
| 252 | if (LateParams->PlatformConfig.UserOptionSlit) { |
| 253 | AgesaStatus = CreateAcpiSlit (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiSlit); |
| 254 | if (AgesaStatus > AmdInitLateStatus) { |
| 255 | AmdInitLateStatus = AgesaStatus; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | // WHEA Table Generation |
| 260 | if (LateParams->PlatformConfig.UserOptionWhea) { |
| 261 | AgesaStatus = CreateAcpiWhea (&LateParams->StdHeader, &LateParams->AcpiWheaMce, &LateParams->AcpiWheaCmc); |
| 262 | if (AgesaStatus > AmdInitLateStatus) { |
| 263 | AmdInitLateStatus = AgesaStatus; |
| 264 | } |
| 265 | } |
| 266 | |
| 267 | // DMI Table Generation |
| 268 | if (LateParams->PlatformConfig.UserOptionDmi) { |
| 269 | AgesaStatus = CreateDmiRecords (&LateParams->StdHeader, &LateParams->DmiTable); |
| 270 | if (AgesaStatus > AmdInitLateStatus) { |
| 271 | AmdInitLateStatus = AgesaStatus; |
| 272 | } |
| 273 | } |
| 274 | IDS_HDT_CONSOLE (MAIN_FLOW, "CreatSystemTable: End\n"); |
| 275 | |
| 276 | // Cpu Features |
| 277 | IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: LateStart\n"); |
| 278 | AgesaStatus = DispatchCpuFeatures (CPU_FEAT_INIT_LATE_END, &LateParams->PlatformConfig, &LateParams->StdHeader); |
| 279 | IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: LateEnd\n"); |
| 280 | if (AgesaStatus > AmdInitLateStatus) { |
| 281 | AmdInitLateStatus = AgesaStatus; |
| 282 | } |
| 283 | |
| 284 | // It is the last function run by the AGESA CPU module and prepares the processor |
| 285 | // for the operating system bootstrap load process. |
| 286 | IDS_HDT_CONSOLE (MAIN_FLOW, "AmdCpuLate: Start\n"); |
| 287 | AgesaStatus = AmdCpuLate (&LateParams->StdHeader); |
| 288 | IDS_HDT_CONSOLE (MAIN_FLOW, "AmdCpuLate: End\n"); |
| 289 | if (AgesaStatus > AmdInitLateStatus) { |
| 290 | AmdInitLateStatus = AgesaStatus; |
| 291 | } |
| 292 | |
| 293 | AgesaStatus = GnbInitAtLate (LateParams); |
| 294 | if (AgesaStatus > AmdInitLateStatus) { |
| 295 | AmdInitLateStatus = AgesaStatus; |
| 296 | } |
| 297 | |
| 298 | IDS_OPTION_HOOK (IDS_INIT_LATE_AFTER, LateParams, &LateParams->StdHeader); |
| 299 | |
| 300 | IDS_OPTION_HOOK (IDS_BEFORE_OS, LateParams, &LateParams->StdHeader); |
| 301 | IDS_PERF_TIME_MEASURE (&LateParams->StdHeader); |
| 302 | AGESA_TESTPOINT (TpIfAmdInitLateExit, &LateParams->StdHeader); |
| 303 | IDS_HDT_CONSOLE (MAIN_FLOW, "\nAmdInitLate: End\n\n"); |
| 304 | AGESA_TESTPOINT (EndAgesaTps, &LateParams->StdHeader); |
| 305 | //End Debug Print Service |
| 306 | IDS_HDT_CONSOLE_EXIT (&LateParams->StdHeader); |
| 307 | return AmdInitLateStatus; |
| 308 | } |
| 309 | |