Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * AMD CPU HT Assist Initialization functions. |
| 6 | * |
| 7 | * Contains code for doing probe filter initialization. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: CPU |
| 12 | * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | |
| 48 | /* |
| 49 | *---------------------------------------------------------------------------- |
| 50 | * MODULES USED |
| 51 | * |
| 52 | *---------------------------------------------------------------------------- |
| 53 | */ |
| 54 | |
| 55 | #include "AGESA.h" |
| 56 | #include "amdlib.h" |
| 57 | #include "Topology.h" |
| 58 | #include "Ids.h" |
| 59 | #include "cpuRegisters.h" |
| 60 | #include "cpuLateInit.h" |
| 61 | #include "cpuFamilyTranslation.h" |
| 62 | #include "cpuServices.h" |
| 63 | #include "GeneralServices.h" |
| 64 | #include "cpuFeatures.h" |
| 65 | #include "cpuHtAssist.h" |
| 66 | #include "Filecode.h" |
| 67 | CODE_GROUP (G2_PEI) |
| 68 | RDATA_GROUP (G2_PEI) |
| 69 | |
| 70 | #define FILECODE PROC_CPU_FEATURE_CPUHTASSIST_FILECODE |
| 71 | /*---------------------------------------------------------------------------- |
| 72 | * DEFINITIONS AND MACROS |
| 73 | * |
| 74 | *---------------------------------------------------------------------------- |
| 75 | */ |
| 76 | |
| 77 | /*---------------------------------------------------------------------------- |
| 78 | * TYPEDEFS AND STRUCTURES |
| 79 | * |
| 80 | *---------------------------------------------------------------------------- |
| 81 | */ |
| 82 | |
| 83 | /*---------------------------------------------------------------------------- |
| 84 | * PROTOTYPES OF LOCAL FUNCTIONS |
| 85 | * |
| 86 | *---------------------------------------------------------------------------- |
| 87 | */ |
| 88 | |
| 89 | /*---------------------------------------------------------------------------- |
| 90 | * EXPORTED FUNCTIONS |
| 91 | * |
| 92 | *---------------------------------------------------------------------------- |
| 93 | */ |
| 94 | extern CPU_FAMILY_SUPPORT_TABLE HtAssistFamilyServiceTable; |
| 95 | |
| 96 | |
| 97 | /*---------------------------------------------------------------------------------------*/ |
| 98 | /** |
| 99 | * Should HT Assist be enabled |
| 100 | * |
| 101 | * @param[in] PlatformConfig Contains the runtime modifiable feature input data. |
| 102 | * @param[in] StdHeader Config Handle for library, services. |
| 103 | * |
| 104 | * @retval TRUE HT Assist is supported. |
| 105 | * @retval FALSE HT Assist cannot be enabled. |
| 106 | * |
| 107 | */ |
| 108 | BOOLEAN |
| 109 | STATIC |
| 110 | IsHtAssistEnabled ( |
| 111 | IN PLATFORM_CONFIGURATION *PlatformConfig, |
| 112 | IN AMD_CONFIG_PARAMS *StdHeader |
| 113 | ) |
| 114 | { |
| 115 | BOOLEAN IsEnabled; |
| 116 | UINT32 CpuCount; |
| 117 | UINT32 Socket; |
| 118 | AP_MAILBOXES ApMailboxes; |
| 119 | HT_ASSIST_FAMILY_SERVICES *FamilyServices; |
| 120 | |
| 121 | IsEnabled = FALSE; |
| 122 | if (PlatformConfig->PlatformProfile.UseHtAssist || |
| 123 | PlatformConfig->PlatformProfile.UseAtmMode) { |
| 124 | CpuCount = GetNumberOfProcessors (StdHeader); |
| 125 | ASSERT (CpuCount != 0); |
| 126 | |
| 127 | if (CpuCount == 1) { |
| 128 | GetApMailbox (&ApMailboxes.ApMailInfo.Info, StdHeader); |
| 129 | if (ApMailboxes.ApMailInfo.Fields.ModuleType != 0) { |
| 130 | IsEnabled = TRUE; |
| 131 | } |
| 132 | } else if (CpuCount > 1) { |
| 133 | IsEnabled = TRUE; |
| 134 | } |
| 135 | if (IsEnabled) { |
| 136 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 137 | if (IsProcessorPresent (Socket, StdHeader)) { |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 138 | GetFeatureServicesOfSocket (&HtAssistFamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader); |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 139 | if ((FamilyServices == NULL) || !FamilyServices->IsHtAssistSupported (FamilyServices, Socket, StdHeader)) { |
| 140 | IsEnabled = FALSE; |
| 141 | break; |
| 142 | } |
| 143 | } |
| 144 | } |
| 145 | } |
| 146 | } |
| 147 | return IsEnabled; |
| 148 | } |
| 149 | |
| 150 | |
| 151 | /*---------------------------------------------------------------------------------------*/ |
| 152 | /** |
| 153 | * Enable the HT Assist feature. |
| 154 | * |
| 155 | * HT Assist initialization requires the following series of steps. |
| 156 | * -# Disable Cache on @b all cores. |
| 157 | * -# Initialize Probe Filter PCI regs |
| 158 | * -# Save L3 Scrub Rate |
| 159 | * -# On each node: |
| 160 | * -# Turn off L3Scrubber and Disable L3 cache |
| 161 | * -# On each node: |
| 162 | * -# Enable probe filter |
| 163 | * -# On each node: |
| 164 | * -# Enable L3 cache and turn on Scrubber. |
| 165 | * -# Restore L3 Scrub Rate |
| 166 | * -# Enable Cache on @b all cores. |
| 167 | * |
| 168 | * @param[in] EntryPoint Timepoint designator. |
| 169 | * @param[in] PlatformConfig Contains the runtime modifiable feature input data. |
| 170 | * @param[in] StdHeader Config Handle for library, services. |
| 171 | * |
| 172 | * @retval AGESA_SUCCESS HT Assist feature is running optimally. |
| 173 | * @retval AGESA_WARNING HT Assist feature is not running optimally. |
| 174 | * |
| 175 | */ |
| 176 | AGESA_STATUS |
| 177 | STATIC |
| 178 | InitializeHtAssistFeature ( |
| 179 | IN UINT64 EntryPoint, |
| 180 | IN PLATFORM_CONFIGURATION *PlatformConfig, |
| 181 | IN AMD_CONFIG_PARAMS *StdHeader |
| 182 | ) |
| 183 | { |
| 184 | UINT32 CpuCount; |
| 185 | UINT32 Socket; |
| 186 | AGESA_STATUS AgesaStatus; |
| 187 | AP_MAILBOXES ApMailboxes; |
| 188 | AP_EXE_PARAMS ApParams; |
| 189 | UINT32 Scrubbers[MAX_SOCKETS_SUPPORTED][L3_SCRUBBER_CONTEXT_ARRAY_SIZE]; |
| 190 | HT_ASSIST_FAMILY_SERVICES *FamilyServices[MAX_SOCKETS_SUPPORTED]; |
| 191 | |
| 192 | AgesaStatus = AGESA_SUCCESS; |
| 193 | |
| 194 | IDS_HDT_CONSOLE (CPU_TRACE, " HT assist is enabled\n"); |
| 195 | |
| 196 | // There are many family service call outs. Initialize the family service array while |
| 197 | // cache is still enabled. |
| 198 | for (Socket = 0; Socket < MAX_SOCKETS_SUPPORTED; Socket++) { |
| 199 | if (IsProcessorPresent (Socket, StdHeader)) { |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 200 | GetFeatureServicesOfSocket (&HtAssistFamilyServiceTable, Socket, (const VOID **)&FamilyServices[Socket], StdHeader); |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 201 | } else { |
| 202 | FamilyServices[Socket] = NULL; |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | if (EntryPoint == CPU_FEAT_AFTER_POST_MTRR_SYNC) { |
| 207 | // Check for optimal settings |
| 208 | GetApMailbox (&ApMailboxes.ApMailInfo.Info, StdHeader); |
| 209 | CpuCount = GetNumberOfProcessors (StdHeader); |
| 210 | if (((CpuCount == 1) && (ApMailboxes.ApMailInfo.Fields.ModuleType == 1)) || |
| 211 | ((CpuCount == 2) && (ApMailboxes.ApMailInfo.Fields.ModuleType == 0))) { |
| 212 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 213 | if (FamilyServices[Socket] != NULL) { |
| 214 | if (FamilyServices[Socket]->IsNonOptimalConfig (FamilyServices[Socket], Socket, StdHeader)) { |
| 215 | // Non-optimal settings. Log an event. |
| 216 | AgesaStatus = AGESA_WARNING; |
| 217 | PutEventLog (AgesaStatus, CPU_WARNING_NONOPTIMAL_HT_ASSIST_CFG, 0, 0, 0, 0, StdHeader); |
| 218 | break; |
| 219 | } |
| 220 | } |
| 221 | } |
| 222 | } |
| 223 | } else { |
| 224 | // Disable the scrubbers. |
| 225 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 226 | if (FamilyServices[Socket] != NULL) { |
| 227 | FamilyServices[Socket]->GetL3ScrubCtrl (FamilyServices[Socket], Socket, &Scrubbers[Socket][0], StdHeader); |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | // Wait for 40us |
| 232 | WaitMicroseconds ((UINT32) 40, StdHeader); |
| 233 | |
| 234 | // Run DisableAllCaches on AP cores. |
| 235 | ApParams.StdHeader = *StdHeader; |
| 236 | ApParams.FunctionNumber = AP_LATE_TASK_DISABLE_CACHE; |
| 237 | ApParams.RelatedDataBlock = NULL; |
| 238 | ApParams.RelatedBlockLength = 0; |
| 239 | RunLateApTaskOnAllAPs (&ApParams, StdHeader); |
| 240 | |
| 241 | // Run DisableAllCaches on core 0. |
| 242 | DisableAllCaches (&ApParams); |
| 243 | |
| 244 | // Family hook before initialization. |
| 245 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 246 | if (FamilyServices[Socket] != NULL) { |
| 247 | FamilyServices[Socket]->HookBeforeInit (FamilyServices[Socket], Socket, StdHeader); |
| 248 | } |
| 249 | } |
| 250 | |
| 251 | // Activate Probe Filter & ATM mode. |
| 252 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 253 | if (FamilyServices[Socket] != NULL) { |
| 254 | if (PlatformConfig->PlatformProfile.UseHtAssist) { |
| 255 | FamilyServices[Socket]->HtAssistInit (FamilyServices[Socket], Socket, StdHeader); |
| 256 | } |
| 257 | if (PlatformConfig->PlatformProfile.UseAtmMode) { |
| 258 | FamilyServices[Socket]->AtmModeInit (FamilyServices[Socket], Socket, StdHeader); |
| 259 | } |
| 260 | } |
| 261 | } |
| 262 | |
| 263 | // Family hook after initialization. |
| 264 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 265 | if (FamilyServices[Socket] != NULL) { |
| 266 | FamilyServices[Socket]->HookAfterInit (FamilyServices[Socket], Socket, StdHeader); |
| 267 | } |
| 268 | } |
| 269 | |
| 270 | // Run EnableAllCaches on core 0. |
| 271 | EnableAllCaches (&ApParams); |
| 272 | |
| 273 | // Run EnableAllCaches on every core. |
| 274 | ApParams.FunctionNumber = AP_LATE_TASK_ENABLE_CACHE; |
| 275 | RunLateApTaskOnAllAPs (&ApParams, StdHeader); |
| 276 | |
| 277 | // Restore the scrubbers. |
| 278 | for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) { |
| 279 | if (FamilyServices[Socket] != NULL) { |
| 280 | FamilyServices[Socket]->SetL3ScrubCtrl (FamilyServices[Socket], Socket, &Scrubbers[Socket][0], StdHeader); |
| 281 | } |
| 282 | } |
| 283 | } |
| 284 | |
| 285 | return AgesaStatus; |
| 286 | } |
| 287 | |
| 288 | /*---------------------------------------------------------------------------------------*/ |
| 289 | /** |
| 290 | * |
| 291 | * Disable all the caches on current core. |
| 292 | * |
| 293 | * @param[in] ApExeParams Handle to config for library and services. |
| 294 | * |
| 295 | * @retval AGESA_SUCCESS Always succeeds. |
| 296 | * |
| 297 | */ |
| 298 | AGESA_STATUS |
| 299 | DisableAllCaches ( |
| 300 | IN AP_EXE_PARAMS *ApExeParams |
| 301 | ) |
| 302 | { |
| 303 | UINT32 CR0Data; |
| 304 | HT_ASSIST_FAMILY_SERVICES *FamilyServices; |
| 305 | |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 306 | GetFeatureServicesOfCurrentCore (&HtAssistFamilyServiceTable, (const VOID **)&FamilyServices, &ApExeParams->StdHeader); |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 307 | |
| 308 | FamilyServices->HookDisableCache (FamilyServices, &ApExeParams->StdHeader); |
| 309 | |
| 310 | // Disable cache through CR0. |
| 311 | LibAmdReadCpuReg (0, &CR0Data); |
| 312 | CR0Data |= (0x60000000); |
| 313 | LibAmdWriteCpuReg (0, CR0Data); |
| 314 | |
| 315 | // Execute wbinvd |
| 316 | LibAmdWriteBackInvalidateCache (); |
| 317 | |
| 318 | return AGESA_SUCCESS; |
| 319 | } |
| 320 | |
| 321 | /*---------------------------------------------------------------------------------------*/ |
| 322 | /** |
| 323 | * |
| 324 | * Enable all the caches on current core. |
| 325 | * |
| 326 | * @param[in] ApExeParams Handle to config for library and services. |
| 327 | * |
| 328 | * @retval AGESA_SUCCESS Always succeeds. |
| 329 | * |
| 330 | */ |
| 331 | AGESA_STATUS |
| 332 | EnableAllCaches ( |
| 333 | IN AP_EXE_PARAMS *ApExeParams |
| 334 | ) |
| 335 | { |
| 336 | UINT32 CR0Data; |
| 337 | HT_ASSIST_FAMILY_SERVICES *FamilyServices; |
| 338 | |
| 339 | // Enable cache through CR0. |
| 340 | LibAmdReadCpuReg (0, &CR0Data); |
| 341 | CR0Data &= ~(0x60000000); |
| 342 | LibAmdWriteCpuReg (0, CR0Data); |
| 343 | |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 344 | GetFeatureServicesOfCurrentCore (&HtAssistFamilyServiceTable, (const VOID **)&FamilyServices, &ApExeParams->StdHeader); |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 345 | |
| 346 | FamilyServices->HookEnableCache (FamilyServices, &ApExeParams->StdHeader); |
| 347 | |
| 348 | return AGESA_SUCCESS; |
| 349 | } |
| 350 | |
| 351 | CONST CPU_FEATURE_DESCRIPTOR ROMDATA CpuFeatureHtAssist = |
| 352 | { |
| 353 | HtAssist, |
| 354 | (CPU_FEAT_AFTER_POST_MTRR_SYNC | CPU_FEAT_INIT_MID_END | CPU_FEAT_S3_LATE_RESTORE_END), |
| 355 | IsHtAssistEnabled, |
| 356 | InitializeHtAssistFeature |
| 357 | }; |