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review.coreboot.org / coreboot / dbdf170dcdf9edbc860766606e53c6d647d89d38 / . / src / vendorcode / amd / agesa / f14 / Proc / CPU / Family / 0x14 / cpuF14LowPowerInit.c
blob: ff25e24c42efbae11c4d66017d078b0fbcb17a38 [file] [log] [blame]
efdesign9884cbce22011-08-04 12:09:17 -0600[diff] [blame]1/* $NoKeywords:$ */
2/**
3 * @file
4 *
5 * AMD Family_14 Optimizations for lower power consumption
6 *
7 * Sets some registers for tablet parts at AmdInitEarly.
8 *
9 * @xrefitem bom "File Content Label" "Release Content"
10 * @e project: AGESA
11 * @e sub-project: CPU/Family/F14
12 * @e \$Revision: 45578 $ @e \$Date: 2011-01-18 19:20:41 -0500 (Tue, 18 Jan 2011) $
13 *
14 */
15/*
16 ******************************************************************************
17 *
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]20 *
efdesign9884cbce22011-08-04 12:09:17 -0600[diff] [blame]21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
efdesign9884cbce22011-08-04 12:09:17 -0600[diff] [blame]30 * from this software without specific prior written permission.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]31 *
efdesign9884cbce22011-08-04 12:09:17 -0600[diff] [blame]32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Edward O'Callaghan1542a6f2014-07-06 19:24:06 +1000[diff] [blame]42 *
efdesign9884cbce22011-08-04 12:09:17 -0600[diff] [blame]43 ******************************************************************************
44 */
45
46/*----------------------------------------------------------------------------------------
47 * M O D U L E S U S E D
48 *----------------------------------------------------------------------------------------
49 */
50#include "AGESA.h"
51#include "amdlib.h"
52#include "cpuFamilyTranslation.h"
53#include "cpuF14PowerMgmt.h"
54#include "cpuF14LowPowerInit.h"
55#include "Filecode.h"
56
57#define FILECODE PROC_CPU_FAMILY_0X14_CPUF14LOWPOWERINIT_FILECODE
58
59/*----------------------------------------------------------------------------------------
60 * D E F I N I T I O N S A N D M A C R O S
61 *----------------------------------------------------------------------------------------
62 */
63
64/*----------------------------------------------------------------------------------------
65 * T Y P E D E F S A N D S T R U C T U R E S
66 *----------------------------------------------------------------------------------------
67 */
68
69/*----------------------------------------------------------------------------------------
70 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
71 *----------------------------------------------------------------------------------------
72 */
73
74/*----------------------------------------------------------------------------------------
75 * E X P O R T E D F U N C T I O N S
76 *----------------------------------------------------------------------------------------
77 */
78
79/*---------------------------------------------------------------------------------------*/
80/**
81 * Family 14h model 0 - 0xF core 0 entry point for programming registers for lower
82 * power consumption.
83 *
84 * Set up D18F6x94[CpuPstateThrEn, CpuPstateThr], and D18F4x134[IntRateCC6DecrRate
85 * according to the BKDG.
86 *
87 * @param[in] FamilySpecificServices The current Family Specific Services.
88 * @param[in] CpuEarlyParams Service parameters
89 * @param[in] StdHeader Config handle for library and services.
90 *
91 */
92VOID
93F14OptimizeForLowPowerInit (
94 IN CPU_SPECIFIC_SERVICES *FamilySpecificServices,
95 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParams,
96 IN AMD_CONFIG_PARAMS *StdHeader
97 )
98{
99 UINT8 NumBoostStates;
100 UINT32 LocalPciRegister;
101 BOOLEAN OptimizeForLowPower;
102 BOOLEAN IsRevC;
103 PCI_ADDR PciAddress;
104 CPU_LOGICAL_ID CpuFamilyRevision;
105
106 PciAddress.AddressValue = PRODUCT_INFO_PCI_ADDR;
107 LibAmdPciRead (AccessWidth32, PciAddress, &LocalPciRegister, StdHeader);
108
109 if ((((PRODUCT_INFO_REGISTER *) &LocalPciRegister)->LowPowerDefault == 1) &&
110 (CpuEarlyParams->PlatformConfig.PlatformProfile.PlatformPowerPolicy == BatteryLife)) {
111 OptimizeForLowPower = TRUE;
112 } else {
113 OptimizeForLowPower = FALSE;
114 }
115
116 // Get F4x15C [4:2] NumBoostStates
117 // Get IsRevC
118 NumBoostStates = 0;
119 IsRevC = FALSE;
120 GetLogicalIdOfCurrentCore (&CpuFamilyRevision, StdHeader);
121 if ((CpuFamilyRevision.Revision & AMD_F14_ON_Cx) != 0) {
122 IsRevC = TRUE;
123 PciAddress.AddressValue = CPB_CTRL_PCI_ADDR;
124 LibAmdPciRead (AccessWidth32, PciAddress, &LocalPciRegister, StdHeader);
125 NumBoostStates = (UINT8) ((CPB_CTRL_REGISTER *) &LocalPciRegister)->NumBoostStates;
126 }
127
128 // F6x94[2:0] CpuPstateThr
129 PciAddress.AddressValue = NB_PSTATE_CFG_HIGH_PCI_ADDR;
130 LibAmdPciRead (AccessWidth32, PciAddress, &LocalPciRegister, StdHeader);
131 if (OptimizeForLowPower) {
132 ((NB_PSTATE_CFG_HIGH_REGISTER *) &LocalPciRegister)->CpuPstateThr = 0;
133 } else {
134 if (NumBoostStates == 0) {
135 ((NB_PSTATE_CFG_HIGH_REGISTER *) &LocalPciRegister)->CpuPstateThr = 1;
136 } else {
137 ((NB_PSTATE_CFG_HIGH_REGISTER *) &LocalPciRegister)->CpuPstateThr = 2;
138 }
139 }
140 // F6x94[3] CpuPstateThrEn = 1
141 ((NB_PSTATE_CFG_HIGH_REGISTER *) &LocalPciRegister)->CpuPstateThrEn = 1;
142 LibAmdPciWrite (AccessWidth32, PciAddress, &LocalPciRegister, StdHeader);
143
144 // F4x134[31:27] IntRateCC6DecrRate
145 PciAddress.AddressValue = CSTATE_MON_CTRL3_PCI_ADDR;
146 LibAmdPciRead (AccessWidth32, PciAddress, &LocalPciRegister, StdHeader);
147 ((CSTATE_MON_CTRL3_REGISTER *) &LocalPciRegister)->IntRateCC6DecrRate = (OptimizeForLowPower || IsRevC) ? 0x18 : 0x8;
148 LibAmdPciWrite (AccessWidth32, PciAddress, &LocalPciRegister, StdHeader);
149}