Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * AMD Family_14 ROM Execution Cache Defaults |
| 6 | * |
| 7 | * Contains default values for ROM execution cache setup |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: CPU/Family/0x14 |
| 12 | * @e \$Revision: 36376 $ @e \$Date: 2010-08-18 00:17:10 +0800 (Wed, 18 Aug 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | 1542a6f | 2014-07-06 19:24:06 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | /*---------------------------------------------------------------------------------------- |
| 48 | * M O D U L E S U S E D |
| 49 | *---------------------------------------------------------------------------------------- |
| 50 | */ |
| 51 | #include "AGESA.h" |
| 52 | #include "cpuCacheInit.h" |
| 53 | #include "cpuFamilyTranslation.h" |
| 54 | #include "Filecode.h" |
| 55 | #define FILECODE PROC_CPU_FAMILY_0X14_CPUF14CACHEDEFAULTS_FILECODE |
| 56 | |
| 57 | /*---------------------------------------------------------------------------------------- |
| 58 | * D E F I N I T I O N S A N D M A C R O S |
| 59 | *---------------------------------------------------------------------------------------- |
| 60 | */ |
| 61 | |
| 62 | /*---------------------------------------------------------------------------------------- |
| 63 | * T Y P E D E F S A N D S T R U C T U R E S |
| 64 | *---------------------------------------------------------------------------------------- |
| 65 | */ |
| 66 | |
| 67 | /*---------------------------------------------------------------------------------------- |
| 68 | * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| 69 | *---------------------------------------------------------------------------------------- |
| 70 | */ |
| 71 | |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 72 | VOID |
| 73 | GetF14CacheInfo ( |
| 74 | IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, |
| 75 | OUT CONST VOID **CacheInfoPtr, |
| 76 | OUT UINT8 *NumberOfElements, |
| 77 | IN AMD_CONFIG_PARAMS *StdHeader |
| 78 | ); |
| 79 | |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 80 | /*---------------------------------------------------------------------------------------- |
| 81 | * E X P O R T E D F U N C T I O N S |
| 82 | *---------------------------------------------------------------------------------------- |
| 83 | */ |
| 84 | #define BSP_STACK_SIZE 16384 |
| 85 | #define CORE0_STACK_SIZE 16384 |
| 86 | #define CORE1_STACK_SIZE 4096 |
| 87 | #define MEM_TRAINING_BUFFER_SIZE 16384 |
| 88 | #define VAR_MTRR_MASK 0x0000000FFFFFFFFF |
| 89 | |
| 90 | #define HEAP_BASE_MASK 0x0000000FFFFFFFFF |
| 91 | |
| 92 | #define SHARED_MEM_SIZE 0 |
| 93 | |
| 94 | CONST CACHE_INFO ROMDATA CpuF14CacheInfo = |
| 95 | { |
| 96 | BSP_STACK_SIZE, |
| 97 | CORE0_STACK_SIZE, |
| 98 | CORE1_STACK_SIZE, |
| 99 | MEM_TRAINING_BUFFER_SIZE, |
| 100 | SHARED_MEM_SIZE, |
| 101 | VAR_MTRR_MASK, |
| 102 | VAR_MTRR_MASK, |
| 103 | HEAP_BASE_MASK, |
| 104 | InfiniteExe |
| 105 | }; |
| 106 | |
| 107 | |
| 108 | /*---------------------------------------------------------------------------------------*/ |
| 109 | /** |
| 110 | * Returns the family specific properties of the cache, and its usage. |
| 111 | * |
| 112 | * @CpuServiceMethod{::F_CPU_GET_FAMILY_SPECIFIC_ARRAY}. |
| 113 | * |
| 114 | * @param[in] FamilySpecificServices The current Family Specific Services. |
| 115 | * @param[out] CacheInfoPtr Points to the cache info properties on exit. |
| 116 | * @param[out] NumberOfElements Will be one to indicate one entry. |
| 117 | * @param[in] StdHeader Header for library and services. |
| 118 | * |
| 119 | */ |
| 120 | VOID |
| 121 | GetF14CacheInfo ( |
| 122 | IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, |
| 123 | OUT CONST VOID **CacheInfoPtr, |
| 124 | OUT UINT8 *NumberOfElements, |
| 125 | IN AMD_CONFIG_PARAMS *StdHeader |
| 126 | ) |
| 127 | { |
| 128 | *NumberOfElements = 1; |
| 129 | *CacheInfoPtr = &CpuF14CacheInfo; |
| 130 | } |
| 131 | |