Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * Install of family 14h support |
| 6 | * |
| 7 | * This file generates the default tables for family 14h processors. |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: Core |
| 12 | * @e \$Revision: 37854 $ @e \$Date: 2010-09-14 06:35:39 +0800 (Tue, 14 Sep 2010) $ |
| 13 | */ |
| 14 | /* |
| 15 | ***************************************************************************** |
| 16 | * |
| 17 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 18 | * All rights reserved. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 19 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 20 | * Redistribution and use in source and binary forms, with or without |
| 21 | * modification, are permitted provided that the following conditions are met: |
| 22 | * * Redistributions of source code must retain the above copyright |
| 23 | * notice, this list of conditions and the following disclaimer. |
| 24 | * * Redistributions in binary form must reproduce the above copyright |
| 25 | * notice, this list of conditions and the following disclaimer in the |
| 26 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 27 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 28 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 29 | * from this software without specific prior written permission. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 30 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 32 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 33 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 34 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 35 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 36 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 37 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 38 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 39 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 40 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 41 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 42 | * *************************************************************************** |
| 43 | * |
| 44 | */ |
| 45 | |
| 46 | #ifndef _OPTION_FAMILY_14H_INSTALL_H_ |
| 47 | #define _OPTION_FAMILY_14H_INSTALL_H_ |
| 48 | |
| 49 | |
| 50 | #include "OptionFamily14hEarlySample.h" |
| 51 | |
| 52 | /* |
| 53 | * Common Family 14h routines |
| 54 | */ |
| 55 | extern F_CPU_DISABLE_PSTATE F14DisablePstate; |
| 56 | extern F_CPU_TRANSITION_PSTATE F14TransitionPstate; |
| 57 | extern F_CPU_GET_TSC_RATE F14GetTscRate; |
| 58 | extern F_CPU_GET_NB_FREQ F14GetCurrentNbFrequency; |
| 59 | extern F_CPU_GET_NB_PSTATE_INFO F14GetNbPstateInfo; |
| 60 | extern F_CPU_IS_NBCOF_INIT_NEEDED F14GetNbCofVidUpdate; |
| 61 | extern F_CPU_AP_INITIAL_LAUNCH F14LaunchApCore; |
| 62 | extern F_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE F14GetApMailboxFromHardware; |
| 63 | extern F_CPU_GET_AP_CORE_NUMBER F14GetApCoreNumber; |
| 64 | extern F_CORE_ID_POSITION_IN_INITIAL_APIC_ID F14CpuAmdCoreIdPositionInInitialApicId; |
| 65 | extern F_CPU_SET_WARM_RESET_FLAG F14SetAgesaWarmResetFlag; |
| 66 | extern F_CPU_GET_WARM_RESET_FLAG F14GetAgesaWarmResetFlag; |
| 67 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14BrandIdString1; |
| 68 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14BrandIdString2; |
| 69 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14CacheInfo; |
| 70 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14SysPmTable; |
| 71 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14WheaInitData; |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 72 | //extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetEmptyArray; |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 73 | extern F_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO F14GetPlatformTypeSpecificInfo; |
| 74 | extern F_CPU_GET_IDD_MAX F14GetProcIddMax; |
| 75 | extern CONST REGISTER_TABLE ROMDATA F14PciRegisterTable; |
| 76 | extern CONST REGISTER_TABLE ROMDATA F14PerCorePciRegisterTable; |
| 77 | extern CONST REGISTER_TABLE ROMDATA F14MsrRegisterTable; |
| 78 | extern F_CPU_NUMBER_OF_BRANDSTRING_CORES F14GetNumberOfCoresForBrandstring; |
| 79 | extern F_GET_EARLY_INIT_TABLE GetF14OnEarlyInitOnCoreTable; |
| 80 | extern F_IS_NB_PSTATE_ENABLED F14IsNbPstateEnabled; |
| 81 | #if OPTION_EARLY_SAMPLES == TRUE |
| 82 | extern CONST REGISTER_TABLE ROMDATA F14EarlySampleMsrRegisterTable; |
| 83 | #endif |
| 84 | |
| 85 | |
| 86 | /* |
| 87 | * Install family 14h model 0 support |
| 88 | */ |
| 89 | #ifdef OPTION_FAMILY14H_ON |
| 90 | #if OPTION_FAMILY14H_ON == TRUE |
| 91 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14OnMicroCodePatchesStruct; |
| 92 | extern F_CPU_GET_FAMILY_SPECIFIC_ARRAY GetF14OnMicrocodeEquivalenceTable; |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 93 | extern CONST REGISTER_TABLE ROMDATA F14OnPciRegisterTable; |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 94 | |
| 95 | #if USES_REGISTER_TABLES == TRUE |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame] | 96 | CONST REGISTER_TABLE ROMDATA * CONST F14OnRegisterTables[] = |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 97 | { |
| 98 | #if BASE_FAMILY_PCI == TRUE |
| 99 | &F14PciRegisterTable, |
| 100 | #endif |
| 101 | #if BASE_FAMILY_PCI == TRUE |
| 102 | &F14PerCorePciRegisterTable, |
| 103 | #endif |
| 104 | #if BASE_FAMILY_MSR == TRUE |
| 105 | &F14MsrRegisterTable, |
| 106 | #if OPTION_EARLY_SAMPLES == TRUE |
| 107 | &F14EarlySampleMsrRegisterTable, |
| 108 | #endif |
| 109 | #endif |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 110 | #if MODEL_SPECIFIC_PCI == TRUE |
| 111 | &F14OnPciRegisterTable, |
| 112 | #endif |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 113 | // the end. |
| 114 | NULL |
| 115 | }; |
| 116 | #endif |
| 117 | |
| 118 | #if USES_REGISTER_TABLES == TRUE |
| 119 | CONST TABLE_ENTRY_TYPE_DESCRIPTOR ROMDATA F14OnTableEntryTypeDescriptors[] = |
| 120 | { |
| 121 | {MsrRegister, SetRegisterForMsrEntry}, |
| 122 | {PciRegister, SetRegisterForPciEntry}, |
| 123 | {FamSpecificWorkaround, SetRegisterForFamSpecificWorkaroundEntry}, |
| 124 | // End |
| 125 | {TableEntryTypeMax, (PF_DO_TABLE_ENTRY)CommonVoid} |
| 126 | }; |
| 127 | #endif |
| 128 | |
| 129 | CONST CPU_SPECIFIC_SERVICES ROMDATA cpuF14OnServices = |
| 130 | { |
| 131 | 0, |
| 132 | #if DISABLE_PSTATE == TRUE |
| 133 | F14DisablePstate, |
| 134 | #else |
| 135 | (PF_CPU_DISABLE_PSTATE) CommonAssert, |
| 136 | #endif |
| 137 | #if TRANSITION_PSTATE == TRUE |
| 138 | F14TransitionPstate, |
| 139 | #else |
| 140 | (PF_CPU_TRANSITION_PSTATE) CommonAssert, |
| 141 | #endif |
| 142 | #if PROC_IDD_MAX == TRUE |
| 143 | F14GetProcIddMax, |
| 144 | #else |
| 145 | (PF_CPU_GET_IDD_MAX) CommonAssert, |
| 146 | #endif |
| 147 | #if GET_TSC_RATE == TRUE |
| 148 | F14GetTscRate, |
| 149 | #else |
| 150 | (PF_CPU_GET_TSC_RATE) CommonAssert, |
| 151 | #endif |
| 152 | #if GET_NB_FREQ == TRUE |
| 153 | F14GetCurrentNbFrequency, |
| 154 | #else |
| 155 | (PF_CPU_GET_NB_FREQ) CommonAssert, |
| 156 | #endif |
| 157 | #if GET_NB_FREQ == TRUE |
| 158 | F14GetNbPstateInfo, |
| 159 | #else |
| 160 | (PF_CPU_GET_NB_PSTATE_INFO) CommonAssert, |
| 161 | #endif |
| 162 | #if IS_NBCOF_INIT_NEEDED == TRUE |
| 163 | F14GetNbCofVidUpdate, |
| 164 | #else |
| 165 | (PF_CPU_IS_NBCOF_INIT_NEEDED) CommonAssert, |
| 166 | #endif |
| 167 | #if AP_INITIAL_LAUNCH == TRUE |
| 168 | F14LaunchApCore, |
| 169 | #else |
| 170 | (PF_CPU_AP_INITIAL_LAUNCH) CommonAssert, |
| 171 | #endif |
| 172 | #if (BRAND_STRING1 == TRUE) || (BRAND_STRING2 == TRUE) |
| 173 | F14GetNumberOfCoresForBrandstring, |
| 174 | #else |
| 175 | (PF_CPU_NUMBER_OF_BRANDSTRING_CORES) CommonAssert, |
| 176 | #endif |
| 177 | #if GET_AP_MAILBOX_FROM_HW == TRUE |
| 178 | F14GetApMailboxFromHardware, |
| 179 | #else |
| 180 | (PF_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE) CommonAssert, |
| 181 | #endif |
| 182 | #if SET_AP_CORE_NUMBER == TRUE |
| 183 | (PF_CPU_SET_AP_CORE_NUMBER) CommonVoid, |
| 184 | #else |
| 185 | (PF_CPU_SET_AP_CORE_NUMBER) CommonAssert, |
| 186 | #endif |
| 187 | #if GET_AP_CORE_NUMBER == TRUE |
| 188 | F14GetApCoreNumber, |
| 189 | #else |
| 190 | (PF_CPU_GET_AP_CORE_NUMBER) CommonAssert, |
| 191 | #endif |
| 192 | #if TRANSFER_AP_CORE_NUMBER == TRUE |
| 193 | (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonVoid, |
| 194 | #else |
| 195 | (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonAssert, |
| 196 | #endif |
| 197 | #if ID_POSITION_INITIAL_APICID == TRUE |
| 198 | F14CpuAmdCoreIdPositionInInitialApicId, |
| 199 | #else |
| 200 | (PF_CORE_ID_POSITION_IN_INITIAL_APIC_ID) CommonAssert, |
| 201 | #endif |
| 202 | #if SAVE_FEATURES == TRUE |
| 203 | (PF_CPU_SAVE_FEATURES) CommonVoid, |
| 204 | #else |
| 205 | (PF_CPU_SAVE_FEATURES) CommonAssert, |
| 206 | #endif |
| 207 | #if WRITE_FEATURES == TRUE |
| 208 | (PF_CPU_WRITE_FEATURES) CommonVoid, |
| 209 | #else |
| 210 | (PF_CPU_WRITE_FEATURES) CommonAssert, |
| 211 | #endif |
| 212 | #if SET_WARM_RESET_FLAG == TRUE |
| 213 | F14SetAgesaWarmResetFlag, |
| 214 | #else |
| 215 | (PF_CPU_SET_WARM_RESET_FLAG) CommonAssert, |
| 216 | #endif |
| 217 | #if GET_WARM_RESET_FLAG == TRUE |
| 218 | F14GetAgesaWarmResetFlag, |
| 219 | #else |
| 220 | (PF_CPU_GET_WARM_RESET_FLAG) CommonAssert, |
| 221 | #endif |
| 222 | #if BRAND_STRING1 == TRUE |
| 223 | GetF14BrandIdString1, |
| 224 | #else |
| 225 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 226 | #endif |
| 227 | #if BRAND_STRING2 == TRUE |
| 228 | GetF14BrandIdString2, |
| 229 | #else |
| 230 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 231 | #endif |
| 232 | #if GET_PATCHES == TRUE |
| 233 | GetF14OnMicroCodePatchesStruct, |
| 234 | #else |
| 235 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 236 | #endif |
| 237 | #if GET_PATCHES_EQUIVALENCE_TABLE == TRUE |
| 238 | GetF14OnMicrocodeEquivalenceTable, |
| 239 | #else |
| 240 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 241 | #endif |
| 242 | #if GET_CACHE_INFO == TRUE |
| 243 | GetF14CacheInfo, |
| 244 | #else |
| 245 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 246 | #endif |
| 247 | #if GET_SYSTEM_PM_TABLE == TRUE |
| 248 | GetF14SysPmTable, |
| 249 | #else |
| 250 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 251 | #endif |
| 252 | #if GET_WHEA_INIT == TRUE |
| 253 | GetF14WheaInitData, |
| 254 | #else |
| 255 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 256 | #endif |
| 257 | #if GET_PLATFORM_TYPE_SPECIFIC_INFO == TRUE |
| 258 | F14GetPlatformTypeSpecificInfo, |
| 259 | #else |
| 260 | (PF_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO) CommonAssert, |
| 261 | #endif |
| 262 | #if IS_NB_PSTATE_ENABLED == TRUE |
| 263 | F14IsNbPstateEnabled, |
| 264 | #else |
| 265 | (PF_IS_NB_PSTATE_ENABLED) CommonAssert, |
| 266 | #endif |
| 267 | #if (BASE_FAMILY_HT_PCI == TRUE) |
| 268 | (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse, |
| 269 | #else |
| 270 | (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse, |
| 271 | #endif |
| 272 | #if (BASE_FAMILY_HT_PCI == TRUE) |
| 273 | (PF_SET_HT_PHY_REGISTER) CommonVoid, |
| 274 | #else |
| 275 | (PF_SET_HT_PHY_REGISTER) CommonAssert, |
| 276 | #endif |
| 277 | #if BASE_FAMILY_PCI == TRUE |
| 278 | (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse, |
| 279 | #else |
| 280 | (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse, |
| 281 | #endif |
| 282 | #if USES_REGISTER_TABLES == TRUE |
| 283 | (REGISTER_TABLE **) F14OnRegisterTables, |
| 284 | #else |
| 285 | NULL, |
| 286 | #endif |
| 287 | #if USES_REGISTER_TABLES == TRUE |
| 288 | (TABLE_ENTRY_TYPE_DESCRIPTOR *) F14OnTableEntryTypeDescriptors, |
| 289 | #else |
| 290 | NULL, |
| 291 | #endif |
| 292 | #if MODEL_SPECIFIC_HT_PCI == TRUE |
| 293 | NULL, |
| 294 | #else |
| 295 | NULL, |
| 296 | #endif |
| 297 | NULL, |
| 298 | InitCacheDisabled, |
| 299 | #if AGESA_ENTRY_INIT_EARLY == TRUE |
| 300 | GetF14OnEarlyInitOnCoreTable |
| 301 | #else |
| 302 | (PF_GET_EARLY_INIT_TABLE) CommonVoid |
| 303 | #endif |
| 304 | }; |
| 305 | |
| 306 | #define ON_SOCKETS 1 |
| 307 | #define ON_MODULES 1 |
| 308 | #define ON_RECOVERY_SOCKETS 1 |
| 309 | #define ON_RECOVERY_MODULES 1 |
| 310 | extern F_CPU_GET_SUBFAMILY_ID_ARRAY GetF14OnLogicalIdAndRev; |
| 311 | #define OPT_F14_ON_ID (PF_CPU_GET_SUBFAMILY_ID_ARRAY) GetF14OnLogicalIdAndRev, |
| 312 | #ifndef ADVCFG_PLATFORM_SOCKETS |
| 313 | #define ADVCFG_PLATFORM_SOCKETS ON_SOCKETS |
| 314 | #else |
| 315 | #if ADVCFG_PLATFORM_SOCKETS < ON_SOCKETS |
| 316 | #undef ADVCFG_PLATFORM_SOCKETS |
| 317 | #define ADVCFG_PLATFORM_SOCKETS ON_SOCKETS |
| 318 | #endif |
| 319 | #endif |
| 320 | #ifndef ADVCFG_PLATFORM_MODULES |
| 321 | #define ADVCFG_PLATFORM_MODULES ON_MODULES |
| 322 | #else |
| 323 | #if ADVCFG_PLATFORM_MODULES < ON_MODULES |
| 324 | #undef ADVCFG_PLATFORM_MODULES |
| 325 | #define ADVCFG_PLATFORM_MODULES ON_MODULES |
| 326 | #endif |
| 327 | #endif |
| 328 | |
| 329 | #if GET_PATCHES == TRUE |
| 330 | #define F14_ON_UCODE_0B |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 331 | #define F14_ON_UCODE_1A |
Nicolas Reinecke | 86393bb | 2015-01-26 14:14:19 +0100 | [diff] [blame] | 332 | #define F14_ON_UCODE_29 |
| 333 | #define F14_ON_UCODE_119 |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 334 | |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 335 | #if AGESA_ENTRY_INIT_EARLY == TRUE |
| 336 | #if OPTION_EARLY_SAMPLES == TRUE |
| 337 | extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500000B; |
| 338 | #undef F14_ON_UCODE_0B |
| 339 | #define F14_ON_UCODE_0B &CpuF14MicrocodePatch0500000B, |
| 340 | |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 341 | extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch0500001A; |
| 342 | #undef F14_ON_UCODE_1A |
| 343 | #define F14_ON_UCODE_1A &CpuF14MicrocodePatch0500001A, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 344 | #endif |
Nicolas Reinecke | 86393bb | 2015-01-26 14:14:19 +0100 | [diff] [blame] | 345 | extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch05000029; |
| 346 | #undef F14_ON_UCODE_29 |
| 347 | #define F14_ON_UCODE_29 &CpuF14MicrocodePatch05000029, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 348 | |
Nicolas Reinecke | 86393bb | 2015-01-26 14:14:19 +0100 | [diff] [blame] | 349 | extern CONST MICROCODE_PATCHES ROMDATA CpuF14MicrocodePatch05000119; |
| 350 | #undef F14_ON_UCODE_119 |
| 351 | #define F14_ON_UCODE_119 &CpuF14MicrocodePatch05000119, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 352 | #endif |
| 353 | |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame] | 354 | CONST MICROCODE_PATCHES ROMDATA * CONST CpuF14OnMicroCodePatchArray[] = |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 355 | { |
Nicolas Reinecke | 86393bb | 2015-01-26 14:14:19 +0100 | [diff] [blame] | 356 | F14_ON_UCODE_119 |
| 357 | F14_ON_UCODE_29 |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 358 | F14_ON_UCODE_0B |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 359 | F14_ON_UCODE_1A |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 360 | NULL |
| 361 | }; |
| 362 | |
| 363 | CONST UINT8 ROMDATA CpuF14OnNumberOfMicrocodePatches = (UINT8) ((sizeof (CpuF14OnMicroCodePatchArray) / sizeof (CpuF14OnMicroCodePatchArray[0])) - 1); |
| 364 | #endif |
| 365 | |
| 366 | #if OPTION_EARLY_SAMPLES == TRUE |
| 367 | extern F_F14_ES_GET_EARLY_INIT_TABLE GetF14OnEarlySampleEarlyInitTable; |
| 368 | extern F_F14_ES_NB_PSTATE_INIT F14NbPstateInitEarlySampleHook; |
| 369 | extern F_F14_ES_POWER_PLANE_INIT F14PowerPlaneInitEarlySampleHook; |
| 370 | |
| 371 | CONST F14_ES_CORE_SUPPORT ROMDATA F14EarlySampleCoreSupport = |
| 372 | { |
| 373 | #if AGESA_ENTRY_INIT_EARLY == TRUE |
| 374 | GetF14OnEarlySampleEarlyInitTable, |
| 375 | F14PowerPlaneInitEarlySampleHook, |
| 376 | #else |
| 377 | (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonAssert, |
| 378 | (PF_F14_ES_POWER_PLANE_INIT) CommonAssert, |
| 379 | #endif |
Kyösti Mälkki | d136b8e | 2017-08-31 16:58:27 +0300 | [diff] [blame] | 380 | #if (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_RESUME == TRUE) |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 381 | F14NbPstateInitEarlySampleHook |
| 382 | #else |
| 383 | (PF_F14_ES_NB_PSTATE_INIT) CommonAssert |
| 384 | #endif |
| 385 | }; |
| 386 | #else |
| 387 | CONST F14_ES_CORE_SUPPORT ROMDATA F14EarlySampleCoreSupport = |
| 388 | { |
| 389 | #if AGESA_ENTRY_INIT_EARLY == TRUE |
| 390 | (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonVoid, |
| 391 | (PF_F14_ES_POWER_PLANE_INIT) CommonVoid, |
| 392 | #else |
| 393 | (PF_F14_ES_GET_EARLY_INIT_TABLE) CommonAssert, |
| 394 | (PF_F14_ES_POWER_PLANE_INIT) CommonAssert, |
| 395 | #endif |
Kyösti Mälkki | d136b8e | 2017-08-31 16:58:27 +0300 | [diff] [blame] | 396 | #if (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_RESUME == TRUE) |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 397 | (PF_F14_ES_NB_PSTATE_INIT) CommonVoid |
| 398 | #else |
| 399 | (PF_F14_ES_NB_PSTATE_INIT) CommonAssert |
| 400 | #endif |
| 401 | }; |
| 402 | #endif |
| 403 | |
| 404 | #define OPT_F14_ON_CPU {AMD_FAMILY_14_ON, &cpuF14OnServices}, |
| 405 | #else // OPTION_FAMILY14H_ON == TRUE |
| 406 | #define OPT_F14_ON_CPU |
| 407 | #define OPT_F14_ON_ID |
| 408 | #endif // OPTION_FAMILY14H_ON == TRUE |
| 409 | #else // defined (OPTION_FAMILY14H_ON) |
| 410 | #define OPT_F14_ON_CPU |
| 411 | #define OPT_F14_ON_ID |
| 412 | #endif // defined (OPTION_FAMILY14H_ON) |
| 413 | |
| 414 | /* |
| 415 | * Install unknown family 14h support |
| 416 | */ |
| 417 | |
| 418 | #if USES_REGISTER_TABLES == TRUE |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame] | 419 | CONST REGISTER_TABLE ROMDATA * CONST F14UnknownRegisterTables[] = |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 420 | { |
| 421 | #if BASE_FAMILY_PCI == TRUE |
| 422 | &F14PciRegisterTable, |
| 423 | #endif |
| 424 | #if BASE_FAMILY_PCI == TRUE |
| 425 | &F14PerCorePciRegisterTable, |
| 426 | #endif |
| 427 | #if BASE_FAMILY_MSR == TRUE |
| 428 | &F14MsrRegisterTable, |
| 429 | #endif |
| 430 | // the end. |
| 431 | NULL |
| 432 | }; |
| 433 | #endif |
| 434 | |
| 435 | #if USES_REGISTER_TABLES == TRUE |
| 436 | CONST TABLE_ENTRY_TYPE_DESCRIPTOR ROMDATA F14UnknownTableEntryTypeDescriptors[] = |
| 437 | { |
| 438 | {MsrRegister, SetRegisterForMsrEntry}, |
| 439 | {PciRegister, SetRegisterForPciEntry}, |
| 440 | {FamSpecificWorkaround, SetRegisterForFamSpecificWorkaroundEntry}, |
| 441 | // End |
| 442 | {TableEntryTypeMax, (PF_DO_TABLE_ENTRY)CommonVoid} |
| 443 | }; |
| 444 | #endif |
| 445 | |
| 446 | CONST CPU_SPECIFIC_SERVICES ROMDATA cpuF14UnknownServices = |
| 447 | { |
| 448 | 0, |
| 449 | #if DISABLE_PSTATE == TRUE |
| 450 | F14DisablePstate, |
| 451 | #else |
| 452 | (PF_CPU_DISABLE_PSTATE) CommonAssert, |
| 453 | #endif |
| 454 | #if TRANSITION_PSTATE == TRUE |
| 455 | F14TransitionPstate, |
| 456 | #else |
| 457 | (PF_CPU_TRANSITION_PSTATE) CommonAssert, |
| 458 | #endif |
| 459 | #if PROC_IDD_MAX == TRUE |
| 460 | (PF_CPU_GET_IDD_MAX) F14GetProcIddMax, |
| 461 | #else |
| 462 | (PF_CPU_GET_IDD_MAX) CommonAssert, |
| 463 | #endif |
| 464 | #if GET_TSC_RATE == TRUE |
| 465 | F14GetTscRate, |
| 466 | #else |
| 467 | (PF_CPU_GET_TSC_RATE) CommonAssert, |
| 468 | #endif |
| 469 | #if GET_NB_FREQ == TRUE |
| 470 | F14GetCurrentNbFrequency, |
| 471 | #else |
| 472 | (PF_CPU_GET_NB_FREQ) CommonAssert, |
| 473 | #endif |
| 474 | #if GET_NB_FREQ == TRUE |
| 475 | F14GetNbPstateInfo, |
| 476 | #else |
| 477 | (PF_CPU_GET_NB_PSTATE_INFO) CommonAssert, |
| 478 | #endif |
| 479 | #if IS_NBCOF_INIT_NEEDED == TRUE |
| 480 | F14GetNbCofVidUpdate, |
| 481 | #else |
| 482 | (PF_CPU_IS_NBCOF_INIT_NEEDED) CommonAssert, |
| 483 | #endif |
| 484 | #if AP_INITIAL_LAUNCH == TRUE |
| 485 | F14LaunchApCore, |
| 486 | #else |
| 487 | (PF_CPU_AP_INITIAL_LAUNCH) CommonAssert, |
| 488 | #endif |
| 489 | #if (BRAND_STRING1 == TRUE) || (BRAND_STRING2 == TRUE) |
| 490 | F14GetNumberOfCoresForBrandstring, |
| 491 | #else |
| 492 | (PF_CPU_NUMBER_OF_BRANDSTRING_CORES) CommonAssert, |
| 493 | #endif |
| 494 | #if GET_AP_MAILBOX_FROM_HW == TRUE |
| 495 | F14GetApMailboxFromHardware, |
| 496 | #else |
| 497 | (PF_CPU_AMD_GET_AP_MAILBOX_FROM_HARDWARE) CommonAssert, |
| 498 | #endif |
| 499 | #if SET_AP_CORE_NUMBER == TRUE |
| 500 | (PF_CPU_SET_AP_CORE_NUMBER) CommonVoid, |
| 501 | #else |
| 502 | (PF_CPU_SET_AP_CORE_NUMBER) CommonAssert, |
| 503 | #endif |
| 504 | #if GET_AP_CORE_NUMBER == TRUE |
| 505 | F14GetApCoreNumber, |
| 506 | #else |
| 507 | (PF_CPU_GET_AP_CORE_NUMBER) CommonAssert, |
| 508 | #endif |
| 509 | #if TRANSFER_AP_CORE_NUMBER == TRUE |
| 510 | (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonVoid, |
| 511 | #else |
| 512 | (PF_CPU_TRANSFER_AP_CORE_NUMBER) CommonAssert, |
| 513 | #endif |
| 514 | #if ID_POSITION_INITIAL_APICID == TRUE |
| 515 | F14CpuAmdCoreIdPositionInInitialApicId, |
| 516 | #else |
| 517 | (PF_CORE_ID_POSITION_IN_INITIAL_APIC_ID) CommonAssert, |
| 518 | #endif |
| 519 | #if SAVE_FEATURES == TRUE |
| 520 | (PF_CPU_SAVE_FEATURES) CommonVoid, |
| 521 | #else |
| 522 | (PF_CPU_SAVE_FEATURES) CommonAssert, |
| 523 | #endif |
| 524 | #if WRITE_FEATURES == TRUE |
| 525 | (PF_CPU_WRITE_FEATURES) CommonVoid, |
| 526 | #else |
| 527 | (PF_CPU_WRITE_FEATURES) CommonAssert, |
| 528 | #endif |
| 529 | #if SET_WARM_RESET_FLAG == TRUE |
| 530 | F14SetAgesaWarmResetFlag, |
| 531 | #else |
| 532 | (PF_CPU_SET_WARM_RESET_FLAG) CommonAssert, |
| 533 | #endif |
| 534 | #if GET_WARM_RESET_FLAG == TRUE |
| 535 | F14GetAgesaWarmResetFlag, |
| 536 | #else |
| 537 | (PF_CPU_GET_WARM_RESET_FLAG) CommonAssert, |
| 538 | #endif |
| 539 | #if BRAND_STRING1 == TRUE |
| 540 | GetF14BrandIdString1, |
| 541 | #else |
| 542 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 543 | #endif |
| 544 | #if BRAND_STRING2 == TRUE |
| 545 | GetF14BrandIdString2, |
| 546 | #else |
| 547 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 548 | #endif |
| 549 | #if GET_PATCHES == TRUE |
| 550 | GetEmptyArray, |
| 551 | #else |
| 552 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 553 | #endif |
| 554 | #if GET_PATCHES_EQUIVALENCE_TABLE == TRUE |
| 555 | GetEmptyArray, |
| 556 | #else |
| 557 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 558 | #endif |
| 559 | #if GET_CACHE_INFO == TRUE |
| 560 | GetF14CacheInfo, |
| 561 | #else |
| 562 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 563 | #endif |
| 564 | #if GET_SYSTEM_PM_TABLE == TRUE |
| 565 | GetF14SysPmTable, |
| 566 | #else |
| 567 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 568 | #endif |
| 569 | #if GET_WHEA_INIT == TRUE |
| 570 | GetF14WheaInitData, |
| 571 | #else |
| 572 | (PF_CPU_GET_FAMILY_SPECIFIC_ARRAY) CommonAssert, |
| 573 | #endif |
| 574 | #if GET_PLATFORM_TYPE_SPECIFIC_INFO == TRUE |
| 575 | F14GetPlatformTypeSpecificInfo, |
| 576 | #else |
| 577 | (PF_CPU_GET_PLATFORM_TYPE_SPECIFIC_INFO) CommonAssert, |
| 578 | #endif |
| 579 | #if IS_NB_PSTATE_ENABLED == TRUE |
| 580 | F14IsNbPstateEnabled, |
| 581 | #else |
| 582 | (PF_IS_NB_PSTATE_ENABLED) CommonAssert, |
| 583 | #endif |
| 584 | #if (BASE_FAMILY_HT_PCI == TRUE) |
| 585 | (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonReturnFalse, |
| 586 | #else |
| 587 | (PF_NEXT_LINK_HAS_HTFPY_FEATS) CommonVoid, |
| 588 | #endif |
| 589 | #if (BASE_FAMILY_HT_PCI == TRUE) |
| 590 | (PF_SET_HT_PHY_REGISTER) CommonVoid, |
| 591 | #else |
| 592 | (PF_SET_HT_PHY_REGISTER) CommonVoid, |
| 593 | #endif |
| 594 | #if BASE_FAMILY_PCI == TRUE |
| 595 | (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse, |
| 596 | #else |
| 597 | (PF_GET_NEXT_HT_LINK_FEATURES) CommonReturnFalse, |
| 598 | #endif |
| 599 | #if USES_REGISTER_TABLES == TRUE |
| 600 | (REGISTER_TABLE **) F14UnknownRegisterTables, |
| 601 | #else |
| 602 | NULL, |
| 603 | #endif |
| 604 | #if USES_REGISTER_TABLES == TRUE |
| 605 | (TABLE_ENTRY_TYPE_DESCRIPTOR *) F14UnknownTableEntryTypeDescriptors, |
| 606 | #else |
| 607 | NULL, |
| 608 | #endif |
| 609 | #if MODEL_SPECIFIC_HT_PCI == TRUE |
| 610 | NULL, |
| 611 | #else |
| 612 | NULL, |
| 613 | #endif |
| 614 | NULL, |
| 615 | InitCacheDisabled, |
| 616 | #if AGESA_ENTRY_INIT_EARLY == TRUE |
| 617 | GetF14OnEarlyInitOnCoreTable |
| 618 | #else |
| 619 | (PF_GET_EARLY_INIT_TABLE) CommonVoid |
| 620 | #endif |
| 621 | }; |
| 622 | |
| 623 | // Family 14h maximum base address is 40 bits. Limit BLDCFG to 40 bits, if appropriate. |
| 624 | #if (FAMILY_MMIO_BASE_MASK < 0xFFFFFF0000000000ull) |
| 625 | #undef FAMILY_MMIO_BASE_MASK |
| 626 | #define FAMILY_MMIO_BASE_MASK (0xFFFFFF0000000000ull) |
| 627 | #endif |
| 628 | |
| 629 | #undef OPT_F14_ID_TABLE |
| 630 | #define OPT_F14_ID_TABLE {0x14, {AMD_FAMILY_14, AMD_F14_UNKNOWN}, F14LogicalIdTable, (sizeof (F14LogicalIdTable) / sizeof (F14LogicalIdTable[0]))}, |
| 631 | #define OPT_F14_UNKNOWN_CPU {AMD_FAMILY_14, &cpuF14UnknownServices}, |
| 632 | |
| 633 | #undef OPT_F14_TABLE |
| 634 | #define OPT_F14_TABLE OPT_F14_ON_CPU OPT_F14_UNKNOWN_CPU |
| 635 | |
| 636 | #if OPTION_FT1_SOCKET_SUPPORT == TRUE |
| 637 | extern CONST CPU_BRAND_TABLE ROMDATA F14OnBrandIdString1ArrayFt1; |
| 638 | extern CONST CPU_BRAND_TABLE ROMDATA F14OnBrandIdString2ArrayFt1; |
| 639 | #define F14_FT1_BRANDSTRING1 &F14OnBrandIdString1ArrayFt1, |
| 640 | #define F14_FT1_BRANDSTRING2 &F14OnBrandIdString2ArrayFt1, |
| 641 | #else |
| 642 | #define F14_FT1_BRANDSTRING1 |
| 643 | #define F14_FT1_BRANDSTRING2 |
| 644 | #endif |
| 645 | |
| 646 | #if BRAND_STRING1 == TRUE |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame] | 647 | CONST CPU_BRAND_TABLE ROMDATA * CONST F14BrandIdString1Tables[] = |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 648 | { |
| 649 | F14_FT1_BRANDSTRING1 |
| 650 | }; |
| 651 | |
| 652 | CONST UINT8 F14BrandIdString1TableCount = (sizeof (F14BrandIdString1Tables) / sizeof (F14BrandIdString1Tables[0])); |
| 653 | #endif |
| 654 | |
| 655 | #if BRAND_STRING2 == TRUE |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame] | 656 | CONST CPU_BRAND_TABLE ROMDATA *CONST F14BrandIdString2Tables[] = |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 657 | { |
| 658 | F14_FT1_BRANDSTRING2 |
| 659 | }; |
| 660 | |
| 661 | CONST UINT8 F14BrandIdString2TableCount = (sizeof (F14BrandIdString2Tables) / sizeof (F14BrandIdString2Tables[0])); |
| 662 | #endif |
| 663 | |
| 664 | CONST PF_CPU_GET_SUBFAMILY_ID_ARRAY ROMDATA F14LogicalIdTable[] = |
| 665 | { |
| 666 | OPT_F14_ON_ID |
| 667 | }; |
| 668 | |
| 669 | #endif // _OPTION_FAMILY_14H_INSTALL_H_ |