Angel Pons | fabfe9d | 2020-04-05 15:47:07 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 2 | |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 3 | #include <device/device.h> |
| 4 | #include <device/pci.h> |
| 5 | #include <device/pci_ops.h> |
| 6 | #include <intelblocks/systemagent.h> |
| 7 | #include <soc/iomap.h> |
| 8 | #include <soc/systemagent.h> |
| 9 | |
| 10 | /* |
| 11 | * SoC implementation |
| 12 | * |
| 13 | * Add all known fixed memory ranges for Host Controller/Memory |
| 14 | * controller. |
| 15 | */ |
| 16 | void soc_add_fixed_mmio_resources(struct device *dev, int *index) |
| 17 | { |
| 18 | static const struct sa_mmio_descriptor soc_fixed_resources[] = { |
| 19 | { PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_SA_PCIEX_LENGTH, |
| 20 | "PCIEXBAR" }, |
| 21 | { MCHBAR, MCH_BASE_ADDRESS, MCH_BASE_SIZE, "MCHBAR" }, |
| 22 | { DMIBAR, DMI_BASE_ADDRESS, DMI_BASE_SIZE, "DMIBAR" }, |
| 23 | { EPBAR, EP_BASE_ADDRESS, EP_BASE_SIZE, "EPBAR" }, |
| 24 | { REGBAR, REG_BASE_ADDRESS, REG_BASE_SIZE, "REGBAR" }, |
| 25 | { EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" }, |
Aamir Bohra | dd7acaa | 2020-03-25 11:36:22 +0530 | [diff] [blame] | 26 | }; |
| 27 | |
| 28 | sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources, |
| 29 | ARRAY_SIZE(soc_fixed_resources)); |
| 30 | |
| 31 | /* Add Vt-d resources if VT-d is enabled */ |
| 32 | if ((pci_read_config32(dev, CAPID0_A) & VTD_DISABLE)) |
| 33 | return; |
| 34 | |
| 35 | sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources, |
| 36 | ARRAY_SIZE(soc_vtd_resources)); |
| 37 | } |
| 38 | |
| 39 | /* |
| 40 | * SoC implementation |
| 41 | * |
| 42 | * Perform System Agent Initialization during Ramstage phase. |
| 43 | */ |
| 44 | void soc_systemagent_init(struct device *dev) |
| 45 | { |
| 46 | /* Enable Power Aware Interrupt Routing */ |
| 47 | enable_power_aware_intr(); |
| 48 | |
| 49 | /* Enable BIOS Reset CPL */ |
| 50 | enable_bios_reset_cpl(); |
| 51 | } |