Karthikeyan Ramasubramanian | 54be00a | 2021-08-11 17:53:42 -0600 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 2 | fw_config |
Kevin Chiu | ef90f07 | 2021-10-07 17:08:30 +0800 | [diff] [blame] | 3 | field KB_BL 0 |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 4 | option KB_BL_ABSENT 0 |
| 5 | option KB_BL_PRESENT 1 |
| 6 | end |
Kevin Chiu | ef90f07 | 2021-10-07 17:08:30 +0800 | [diff] [blame] | 7 | field FP 1 |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 8 | option FP_ABSENT 0 |
| 9 | option FP_PRESENT 1 |
| 10 | end |
Kevin Chiu | ef90f07 | 2021-10-07 17:08:30 +0800 | [diff] [blame] | 11 | field WLAN 2 3 |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 12 | option WLAN_WCN6856 0 |
| 13 | option WLAN_RTL8852 1 |
| 14 | end |
Kevin Chiu | ef90f07 | 2021-10-07 17:08:30 +0800 | [diff] [blame] | 15 | field WWAN 4 5 |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 16 | option WWAN_DIASABLED 0 |
| 17 | option WWAN_L850GL 1 |
| 18 | end |
Kevin Chiu | ef90f07 | 2021-10-07 17:08:30 +0800 | [diff] [blame] | 19 | field STORAGE 6 |
| 20 | option STORAGE_EMMC 0 |
| 21 | option STORAGE_SSD 1 |
| 22 | end |
| 23 | field KB_MAP 7 |
| 24 | option KB_MAP_PRIVACY 0 |
| 25 | option KB_MAP_NO_PRIVACY 1 |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 26 | end |
| 27 | end |
Karthikeyan Ramasubramanian | 54be00a | 2021-08-11 17:53:42 -0600 | [diff] [blame] | 28 | |
| 29 | chip soc/amd/cezanne |
Kevin Chiu | cb8c3dd | 2021-12-14 10:17:29 +0800 | [diff] [blame] | 30 | |
| 31 | register "usb_phy_custom" = "1" |
| 32 | register "usb_phy" = "{ |
| 33 | /* Left USB C0 Port */ |
| 34 | .Usb2PhyPort[0] = { |
| 35 | .compdstune = 5, |
| 36 | .sqrxtune = 3, |
| 37 | .txfslstune = 3, |
| 38 | .txpreempamptune = 1, |
| 39 | .txpreemppulsetune = 0, |
| 40 | .txrisetune = 1, |
| 41 | .txvreftune = 9, |
| 42 | .txhsxvtune = 3, |
| 43 | .txrestune = 1, |
| 44 | }, |
| 45 | /* Left USB A0 Port or WWAN */ |
| 46 | .Usb2PhyPort[1] = { |
| 47 | .compdstune = 5, |
| 48 | .sqrxtune = 3, |
| 49 | .txfslstune = 3, |
| 50 | .txpreempamptune = 1, |
| 51 | .txpreemppulsetune = 0, |
| 52 | .txrisetune = 1, |
| 53 | .txvreftune = 9, |
| 54 | .txhsxvtune = 3, |
| 55 | .txrestune = 1, |
| 56 | }, |
| 57 | /* User facing camera */ |
| 58 | .Usb2PhyPort[2] = { |
| 59 | .compdstune = 1, |
| 60 | .sqrxtune = 3, |
| 61 | .txfslstune = 3, |
| 62 | .txpreempamptune = 2, |
| 63 | .txpreemppulsetune = 0, |
| 64 | .txrisetune = 2, |
| 65 | .txvreftune = 3, |
| 66 | .txhsxvtune = 3, |
| 67 | .txrestune = 2, |
| 68 | }, |
| 69 | /* World facing camera */ |
| 70 | .Usb2PhyPort[3] = { |
| 71 | .compdstune = 1, |
| 72 | .sqrxtune = 3, |
| 73 | .txfslstune = 3, |
| 74 | .txpreempamptune = 2, |
| 75 | .txpreemppulsetune = 0, |
| 76 | .txrisetune = 2, |
| 77 | .txvreftune = 3, |
| 78 | .txhsxvtune = 3, |
| 79 | .txrestune = 2, |
| 80 | }, |
| 81 | /* Right USB C1 Port */ |
| 82 | .Usb2PhyPort[4] = { |
| 83 | .compdstune = 6, |
| 84 | .sqrxtune = 3, |
| 85 | .txfslstune = 3, |
| 86 | .txpreempamptune = 1, |
| 87 | .txpreemppulsetune = 0, |
| 88 | .txrisetune = 1, |
| 89 | .txvreftune = 0xe, |
| 90 | .txhsxvtune = 3, |
| 91 | .txrestune = 1, |
| 92 | }, |
| 93 | /* Right USB A1 Port */ |
| 94 | .Usb2PhyPort[5] = { |
| 95 | .compdstune = 5, |
| 96 | .sqrxtune = 3, |
| 97 | .txfslstune = 3, |
| 98 | .txpreempamptune = 1, |
| 99 | .txpreemppulsetune = 0, |
| 100 | .txrisetune = 1, |
| 101 | .txvreftune = 9, |
| 102 | .txhsxvtune = 3, |
| 103 | .txrestune = 1, |
| 104 | }, |
| 105 | /* WiFi / Bluetooth */ |
| 106 | .Usb2PhyPort[6] = { |
| 107 | .compdstune = 1, |
| 108 | .sqrxtune = 3, |
| 109 | .txfslstune = 3, |
| 110 | .txpreempamptune = 2, |
| 111 | .txpreemppulsetune = 0, |
| 112 | .txrisetune = 2, |
| 113 | .txvreftune = 3, |
| 114 | .txhsxvtune = 3, |
| 115 | .txrestune = 2, |
| 116 | }, |
| 117 | /* Smart Card */ |
| 118 | .Usb2PhyPort[7] = { |
| 119 | .compdstune = 1, |
| 120 | .sqrxtune = 3, |
| 121 | .txfslstune = 3, |
| 122 | .txpreempamptune = 2, |
| 123 | .txpreemppulsetune = 0, |
| 124 | .txrisetune = 2, |
| 125 | .txvreftune = 3, |
| 126 | .txhsxvtune = 3, |
| 127 | .txrestune = 2, |
| 128 | }, |
| 129 | /* Left USB C0 Port */ |
| 130 | .Usb3PhyPort[0] = { |
| 131 | .tx_term_ctrl=2, |
| 132 | .rx_term_ctrl=2, |
| 133 | .tx_vboost_lvl_en=1, |
| 134 | .tx_vboost_lvl=5, |
| 135 | }, |
| 136 | /* Left USB A0 Port or WWAN */ |
| 137 | .Usb3PhyPort[1] = { |
| 138 | .tx_term_ctrl=2, |
| 139 | .rx_term_ctrl=2, |
| 140 | .tx_vboost_lvl_en=1, |
| 141 | .tx_vboost_lvl=5, |
| 142 | }, |
| 143 | /* Right USB C1 Port */ |
| 144 | .Usb3PhyPort[2] = { |
| 145 | .tx_term_ctrl=2, |
| 146 | .rx_term_ctrl=2, |
| 147 | .tx_vboost_lvl_en=1, |
| 148 | .tx_vboost_lvl=5, |
| 149 | }, |
| 150 | /* Right USB A1 Port */ |
| 151 | .Usb3PhyPort[3] = { |
| 152 | .tx_term_ctrl=2, |
| 153 | .rx_term_ctrl=2, |
| 154 | .tx_vboost_lvl_en=1, |
| 155 | .tx_vboost_lvl=5, |
| 156 | }, |
| 157 | .ComboPhyStaticConfig[0] = 0, |
| 158 | .ComboPhyStaticConfig[1] = 0, |
| 159 | .BatteryChargerEnable = 0, |
| 160 | .PhyP3CpmP4Support = 0, |
| 161 | }" |
| 162 | |
Karthikeyan Ramasubramanian | 54be00a | 2021-08-11 17:53:42 -0600 | [diff] [blame] | 163 | device domain 0 on |
Kevin Chiu | 7cbeaff | 2021-10-06 19:02:56 +0800 | [diff] [blame] | 164 | device ref gpp_bridge_2 on |
| 165 | # Required so the NVMe gets placed into D3 when entering S0i3. |
| 166 | chip drivers/pcie/rtd3/device |
| 167 | register "name" = ""NVME"" |
| 168 | device pci 00.0 on end |
| 169 | end |
Kevin Chiu | 48bd857 | 2021-10-18 16:39:20 +0800 | [diff] [blame] | 170 | probe STORAGE STORAGE_EMMC |
| 171 | end # EMMC |
| 172 | device ref gpp_bridge_3 on |
| 173 | # Required so the NVMe gets placed into D3 when entering S0i3. |
| 174 | chip drivers/pcie/rtd3/device |
| 175 | register "name" = ""NVME"" |
| 176 | device pci 00.0 on end |
| 177 | end |
| 178 | probe STORAGE STORAGE_SSD |
Kevin Chiu | 7cbeaff | 2021-10-06 19:02:56 +0800 | [diff] [blame] | 179 | end # NVMe |
Patrick Huang | 9de5d8d | 2021-09-13 16:41:25 +0800 | [diff] [blame] | 180 | device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A |
Kevin Chiu | b3b17b2 | 2022-01-16 23:42:22 +0800 | [diff] [blame] | 181 | device ref gfx on |
| 182 | chip drivers/gfx/generic |
| 183 | register "device_count" = "1" |
| 184 | register "device[0].name" = ""LCD"" |
| 185 | # Use Chrome OS privacy screen _HID |
| 186 | register "device[0].hid" = ""GOOG0010"" |
| 187 | # Internal panel on the first port of the graphics chip |
| 188 | register "device[0].addr" = "0x80010400" |
| 189 | register "device[0].privacy.enabled" = "1" |
| 190 | register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_5)" |
| 191 | device generic 0.0 on end |
| 192 | end |
| 193 | end |
Patrick Huang | 9de5d8d | 2021-09-13 16:41:25 +0800 | [diff] [blame] | 194 | device ref acp on |
| 195 | chip drivers/amd/i2s_machine_dev |
| 196 | register "hid" = ""10029836"" |
| 197 | device generic 0.0 on end |
| 198 | end |
| 199 | end # Audio |
| 200 | end |
Karthikeyan Ramasubramanian | 54be00a | 2021-08-11 17:53:42 -0600 | [diff] [blame] | 201 | end # domain |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 202 | |
| 203 | register "slow_ppt_limit_mW" = "25000" |
| 204 | register "fast_ppt_limit_mW" = "30000" |
| 205 | register "slow_ppt_time_constant_s" = "5" |
| 206 | register "stapm_time_constant_s" = "275" |
Kevin Chiu | d736fd4 | 2022-02-15 16:09:40 +0800 | [diff] [blame^] | 207 | register "sustained_power_limit_mW" = "12000" |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 208 | register "thermctl_limit_degreeC" = "100" |
| 209 | |
Kevin Chiu | b138a8e | 2021-12-20 14:19:56 +0800 | [diff] [blame] | 210 | register "telemetry_vddcrvddfull_scale_current_mA" = "73331" #mA |
| 211 | register "telemetry_vddcrvddoffset" = "1893" |
| 212 | register "telemetry_vddcrsocfull_scale_current_mA" = "31955" #mA |
| 213 | register "telemetry_vddcrsocoffset" = "852" |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 214 | |
Kevin Chiu | d736fd4 | 2022-02-15 16:09:40 +0800 | [diff] [blame^] | 215 | # Enable STT support |
| 216 | register "stt_control" = "1" |
| 217 | register "stt_pcb_sensor_count" = "2" |
| 218 | register "stt_min_limit" = "12000" |
| 219 | register "stt_m1" = "0x466" |
| 220 | register "stt_m2" = "0xFF3B" |
| 221 | register "stt_m3" = "0" |
| 222 | register "stt_m4" = "0" |
| 223 | register "stt_m5" = "0" |
| 224 | register "stt_m6" = "0" |
| 225 | register "stt_c_apu" = "0x14DA" |
| 226 | register "stt_c_gpu" = "0" |
| 227 | register "stt_c_hs2" = "0" |
| 228 | register "stt_alpha_apu" = "0x199A" |
| 229 | register "stt_alpha_gpu" = "0" |
| 230 | register "stt_alpha_hs2" = "0" |
| 231 | register "stt_skin_temp_apu" = "0x2E00" |
| 232 | register "stt_skin_temp_gpu" = "0" |
| 233 | register "stt_skin_temp_hs2" = "0" |
| 234 | register "stt_error_coeff" = "0x21" |
| 235 | register "stt_error_rate_coefficient" = "0x2666" |
| 236 | |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 237 | # I2C Config |
| 238 | #+-------------------+---------------------------+ |
| 239 | #| Field | Value | |
| 240 | #+-------------------+---------------------------+ |
| 241 | #| I2C0 | Trackpad | |
| 242 | #| I2C1 | Touchscreen | |
| 243 | #| I2C2 | Speaker, Codec, P-SAR | |
| 244 | #| I2C3 | H1 TPM | |
| 245 | #+-------------------+---------------------------+ |
| 246 | register "i2c[0]" = "{ |
| 247 | .speed = I2C_SPEED_FAST, |
| 248 | }" |
| 249 | |
| 250 | register "i2c[1]" = "{ |
| 251 | .speed = I2C_SPEED_FAST, |
| 252 | }" |
| 253 | |
| 254 | register "i2c[2]" = "{ |
| 255 | .speed = I2C_SPEED_FAST, |
| 256 | }" |
| 257 | |
| 258 | register "i2c[3]" = "{ |
| 259 | .speed = I2C_SPEED_FAST, |
| 260 | .early_init = true, |
| 261 | }" |
| 262 | |
Zheng Bao | 73674a7 | 2021-12-06 23:10:37 +0800 | [diff] [blame] | 263 | register "edp_phy_override" = "1" |
| 264 | |
| 265 | # bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2, bit3=1: DP3 |
| 266 | register "edp_physel" = "0x1" |
| 267 | |
| 268 | register "edp_tuningset" = "{ |
| 269 | .dp_vs_pemph_level = 0x00, |
| 270 | .tx_eq_main = 0x1f, |
| 271 | .tx_eq_pre = 0x0, |
| 272 | .tx_eq_post = 0x0, |
| 273 | .tx_vboost_lvl = 0x5, |
| 274 | }" |
| 275 | |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 276 | device ref i2c_0 on |
| 277 | chip drivers/i2c/generic |
| 278 | register "hid" = ""ELAN0000"" |
| 279 | register "desc" = ""ELAN Touchpad"" |
| 280 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" |
| 281 | register "wake" = "GEVENT_22" |
| 282 | register "probed" = "1" |
| 283 | device i2c 15 on end |
| 284 | end |
| 285 | end # I2C0 |
| 286 | |
| 287 | device ref i2c_1 on |
Kevin Chiu | 36aab93 | 2021-09-08 12:09:12 +0800 | [diff] [blame] | 288 | chip drivers/i2c/generic |
| 289 | register "hid" = ""ELAN0001"" |
| 290 | register "desc" = ""ELAN Touchscreen"" |
| 291 | register "probed" = "1" |
| 292 | register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" |
| 293 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)" |
| 294 | register "enable_delay_ms" = "1" |
| 295 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_121)" |
| 296 | register "reset_delay_ms" = "20" |
| 297 | register "has_power_resource" = "1" |
| 298 | device i2c 10 on end |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 299 | end |
Kevin Chiu | f473af7 | 2021-10-25 11:12:06 +0800 | [diff] [blame] | 300 | chip drivers/i2c/hid |
| 301 | register "generic.hid" = ""GTCH7503"" |
| 302 | register "generic.desc" = ""G2TOUCH Touchscreen"" |
| 303 | register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_89)" |
| 304 | register "generic.probed" = "1" |
| 305 | register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)" |
| 306 | register "generic.enable_delay_ms" = "1" |
| 307 | register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_121)" |
| 308 | register "generic.reset_delay_ms" = "50" |
| 309 | register "generic.has_power_resource" = "1" |
| 310 | register "hid_desc_reg_offset" = "0x01" |
| 311 | device i2c 40 on end |
| 312 | end |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 313 | end # I2C1 |
| 314 | |
| 315 | device ref i2c_2 on |
| 316 | chip drivers/i2c/generic |
Patrick Huang | 9de5d8d | 2021-09-13 16:41:25 +0800 | [diff] [blame] | 317 | register "hid" = ""RTL5682"" |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 318 | register "name" = ""RT58"" |
| 319 | register "desc" = ""Realtek RT5682"" |
| 320 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)" |
| 321 | register "property_count" = "1" |
| 322 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 323 | register "property_list[0].name" = ""realtek,jd-src"" |
| 324 | register "property_list[0].integer" = "1" |
| 325 | device i2c 1a on end |
| 326 | end |
| 327 | end # I2C2 |
| 328 | |
| 329 | device ref uart_1 on |
| 330 | chip drivers/uart/acpi |
| 331 | register "name" = ""CRFP"" |
| 332 | register "desc" = ""Fingerprint Reader"" |
| 333 | register "hid" = "ACPI_DT_NAMESPACE_HID" |
| 334 | register "compat_string" = ""google,cros-ec-uart"" |
| 335 | register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_21)" |
| 336 | register "wake" = "GEVENT_5" |
| 337 | register "uart" = "ACPI_UART_RAW_DEVICE(3000000, 64)" |
Karthikeyan Ramasubramanian | f8fe39b | 2021-10-28 11:19:17 -0600 | [diff] [blame] | 338 | register "has_power_resource" = "1" |
| 339 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_11)" |
| 340 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_3)" |
| 341 | register "enable_delay_ms" = "3" |
Furquan Shaikh | 56fd641 | 2021-09-16 20:38:24 -0700 | [diff] [blame] | 342 | device generic 0 alias fpmcu on |
Kevin Chiu | c112fe4 | 2021-08-30 21:41:30 +0800 | [diff] [blame] | 343 | probe FP FP_PRESENT |
| 344 | end |
| 345 | end |
| 346 | end |
| 347 | |
Patrick Huang | 9de5d8d | 2021-09-13 16:41:25 +0800 | [diff] [blame] | 348 | chip drivers/generic/max98357a |
Patrick Huang | fcc556f | 2021-10-05 15:57:50 +0800 | [diff] [blame] | 349 | register "hid" = ""MX98360A"" |
Kevin Chiu | a592bef | 2021-11-09 23:03:35 +0800 | [diff] [blame] | 350 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_70)" |
Patrick Huang | 9de5d8d | 2021-09-13 16:41:25 +0800 | [diff] [blame] | 351 | register "sdmode_delay" = "5" |
| 352 | device generic 0.1 on end |
| 353 | end |
| 354 | |
Karthikeyan Ramasubramanian | 54be00a | 2021-08-11 17:53:42 -0600 | [diff] [blame] | 355 | end # chip soc/amd/cezanne |