blob: f14dde0b551943d3ad881f9a2a02b0bf80f98b7a [file] [log] [blame]
Lee Leahyd4edacb2016-02-08 07:12:30 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Google Inc.
5 * Copyright (C) 2015-2016 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include "chip.h"
18#include <console/console.h>
19#include <fsp/ramstage.h>
20
21static void soc_init(void *chip_info)
22{
23 /* Perform silicon specific init. */
24 if (IS_ENABLED(CONFIG_RELOCATE_FSP_INTO_DRAM))
25 intel_silicon_init();
26 else
27 fsp_run_silicon_init(find_fsp(CONFIG_FSP_ESRAM_LOC), 0);
28}
29
30struct chip_operations soc_intel_quark_ops = {
31 CHIP_NAME("Intel Quark")
32 .init = &soc_init,
33};