Duncan Laurie | 09170f1 | 2015-10-09 09:25:32 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * Copyright (C) 2015 Google Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Duncan Laurie | 09170f1 | 2015-10-09 09:25:32 -0700 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <arch/io.h> |
| 18 | #include <console/console.h> |
| 19 | #include <cpu/x86/smm.h> |
| 20 | #include <elog.h> |
| 21 | #include <ec/google/chromeec/ec.h> |
Aaron Durbin | d49d42f | 2015-11-11 16:50:52 -0600 | [diff] [blame^] | 22 | #include <gpio.h> |
Duncan Laurie | 09170f1 | 2015-10-09 09:25:32 -0700 | [diff] [blame] | 23 | #include <soc/iomap.h> |
| 24 | #include <soc/nvs.h> |
| 25 | #include <soc/pm.h> |
| 26 | #include <soc/smm.h> |
| 27 | #include "ec.h" |
| 28 | #include "gpio.h" |
| 29 | |
| 30 | int mainboard_io_trap_handler(int smif) |
| 31 | { |
| 32 | switch (smif) { |
| 33 | case 0x99: |
| 34 | printk(BIOS_DEBUG, "Sample\n"); |
| 35 | smm_get_gnvs()->smif = 0; |
| 36 | break; |
| 37 | default: |
| 38 | return 0; |
| 39 | } |
| 40 | |
| 41 | /* On success, the IO Trap Handler returns 0 |
| 42 | * On failure, the IO Trap Handler returns a value != 0 |
| 43 | * |
| 44 | * For now, we force the return value to 0 and log all traps to |
| 45 | * see what's going on. |
| 46 | */ |
| 47 | return 1; |
| 48 | } |
| 49 | |
| 50 | static u8 mainboard_smi_ec(void) |
| 51 | { |
| 52 | u8 cmd = 0; |
| 53 | #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |
| 54 | u32 pm1_cnt; |
| 55 | cmd = google_chromeec_get_event(); |
| 56 | |
| 57 | /* Log this event */ |
| 58 | if (IS_ENABLED(CONFIG_ELOG_GSMI) && cmd) |
| 59 | elog_add_event_byte(ELOG_TYPE_EC_EVENT, cmd); |
| 60 | |
| 61 | switch (cmd) { |
| 62 | case EC_HOST_EVENT_LID_CLOSED: |
| 63 | printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n"); |
| 64 | |
| 65 | /* Go to S5 */ |
| 66 | pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); |
| 67 | pm1_cnt |= (0xf << 10); |
| 68 | outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT); |
| 69 | break; |
| 70 | } |
| 71 | #endif |
| 72 | return cmd; |
| 73 | } |
| 74 | |
| 75 | void mainboard_smi_gpi_handler(const struct gpi_status *sts) |
| 76 | { |
| 77 | if (gpi_status_get(sts, EC_SMI_GPI)) { |
| 78 | /* Process all pending events */ |
| 79 | while (mainboard_smi_ec() != 0) |
| 80 | ; |
| 81 | } |
| 82 | } |
| 83 | |
Aaron Durbin | d49d42f | 2015-11-11 16:50:52 -0600 | [diff] [blame^] | 84 | static void google_ec_smi_sleep(u8 slp_typ) |
Duncan Laurie | 09170f1 | 2015-10-09 09:25:32 -0700 | [diff] [blame] | 85 | { |
Duncan Laurie | 09170f1 | 2015-10-09 09:25:32 -0700 | [diff] [blame] | 86 | switch (slp_typ) { |
| 87 | case 3: |
| 88 | /* Enable wake events */ |
| 89 | google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); |
| 90 | break; |
| 91 | case 5: |
| 92 | /* Enable wake events */ |
| 93 | google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); |
| 94 | break; |
| 95 | } |
| 96 | |
| 97 | /* Disable SCI and SMI events */ |
| 98 | google_chromeec_set_smi_mask(0); |
| 99 | google_chromeec_set_sci_mask(0); |
| 100 | |
| 101 | /* Clear pending events that may trigger immediate wake */ |
| 102 | while (google_chromeec_get_event() != 0) |
| 103 | ; |
Aaron Durbin | d49d42f | 2015-11-11 16:50:52 -0600 | [diff] [blame^] | 104 | } |
| 105 | |
| 106 | static void mainboard_gpio_smi_sleep(u8 slp_typ) |
| 107 | { |
| 108 | int i; |
| 109 | |
| 110 | /* Power down the rails on any sleep type. */ |
| 111 | gpio_t active_high_signals[] = { |
| 112 | EN_PP3300_KEPLER, |
| 113 | EN_PP3300_DX_TOUCH, |
| 114 | EN_PP3300_DX_EMMC, |
| 115 | EN_PP1800_DX_EMMC, |
| 116 | EN_PP3300_DX_CAM, |
| 117 | }; |
| 118 | |
| 119 | for (i = 0; i < ARRAY_SIZE(active_high_signals); i++) |
| 120 | gpio_set(active_high_signals[i], 0); |
| 121 | } |
| 122 | |
| 123 | void mainboard_smi_sleep(u8 slp_typ) |
| 124 | { |
| 125 | if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) |
| 126 | google_ec_smi_sleep(slp_typ); |
| 127 | |
| 128 | mainboard_gpio_smi_sleep(slp_typ); |
Duncan Laurie | 09170f1 | 2015-10-09 09:25:32 -0700 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | int mainboard_smi_apmc(u8 apmc) |
| 132 | { |
| 133 | #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) |
| 134 | switch (apmc) { |
| 135 | case APM_CNT_ACPI_ENABLE: |
| 136 | google_chromeec_set_smi_mask(0); |
| 137 | /* Clear all pending events */ |
| 138 | while (google_chromeec_get_event() != 0) |
| 139 | ; |
| 140 | google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS); |
| 141 | break; |
| 142 | case APM_CNT_ACPI_DISABLE: |
| 143 | google_chromeec_set_sci_mask(0); |
| 144 | /* Clear all pending events */ |
| 145 | while (google_chromeec_get_event() != 0) |
| 146 | ; |
| 147 | google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS); |
| 148 | break; |
| 149 | } |
| 150 | #endif |
| 151 | return 0; |
| 152 | } |