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review.coreboot.org / coreboot / d3ff66d1fb086eaeff9b53dad4175e99bec59879 / . / src / mainboard / google / rex / variants / screebo / fw_config.c
blob: 2d37cf23a6e3a0da22e9f28d01cc7e07e27e9709 [file] [log] [blame]
Terry Cheong03807ac2023-12-07 19:39:41 +0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <baseboard/variants.h>
Kun Liud3ff66d2023-12-11 11:15:28 +0800[diff] [blame^]4#include <ec/google/chromeec/ec.h>
Terry Cheong03807ac2023-12-07 19:39:41 +0800[diff] [blame]5#include <bootstate.h>
6#include <console/console.h>
7#include <fw_config.h>
8#include <gpio.h>
9
10#define GPIO_PADBASED_OVERRIDE(b, a) gpio_padbased_override(b, a, ARRAY_SIZE(a))
11
12static const struct pad_config dmic_disable_pads[] = {
13 PAD_NC(GPP_S02, NONE),
14 PAD_NC(GPP_S03, NONE),
15 PAD_NC(GPP_S06, NONE),
16 PAD_NC(GPP_S07, NONE),
17};
18
19static const struct pad_config i2s_disable_pads[] = {
20 PAD_NC(GPP_D09, NONE),
21 PAD_NC(GPP_D10, NONE),
22 PAD_NC(GPP_D11, NONE),
23 PAD_NC(GPP_D12, DN_20K),
24 PAD_NC(GPP_D13, NONE),
25 PAD_NC(GPP_D14, NONE),
26 PAD_NC(GPP_D15, NONE),
27 PAD_NC(GPP_D16, NONE),
28 PAD_NC(GPP_D17, NONE),
29};
30
31
32static const struct pad_config bt_i2s_enable_pads[] = {
33 /* GPP_V30 : [] ==> BT_I2S_BCLK */
34 PAD_CFG_NF(GPP_VGPIO30, NONE, DEEP, NF2),
35 /* GPP_V31 : [] ==> BT_I2S_SYNC */
36 PAD_CFG_NF(GPP_VGPIO31, NONE, DEEP, NF2),
37 /* GPP_V32 : [] ==> BT_I2S_SDO */
38 PAD_CFG_NF(GPP_VGPIO32, NONE, DEEP, NF2),
39 /* GPP_V33 : [] ==> BT_I2S_SDI */
40 PAD_CFG_NF(GPP_VGPIO33, NONE, DEEP, NF2),
41 /* GPP_V34 : [] ==> SSP2_SCLK */
42 PAD_CFG_NF(GPP_VGPIO34, NONE, DEEP, NF1),
43 /* GPP_V35 : [] ==> SSP2_SFRM */
44 PAD_CFG_NF(GPP_VGPIO35, NONE, DEEP, NF1),
45 /* GPP_V36 : [] ==> SSP_TXD */
46 PAD_CFG_NF(GPP_VGPIO36, NONE, DEEP, NF1),
47 /* GPP_V37 : [] ==> SSP_RXD */
48 PAD_CFG_NF(GPP_VGPIO37, NONE, DEEP, NF1),
49};
50
51static const struct pad_config bt_i2s_disable_pads[] = {
52 /* GPP_V30 : [] ==> BT_I2S_BCLK */
53 PAD_NC(GPP_VGPIO30, NONE),
54 /* GPP_V31 : [] ==> BT_I2S_SYNC */
55 PAD_NC(GPP_VGPIO31, NONE),
56 /* GPP_V32 : [] ==> BT_I2S_SDO */
57 PAD_NC(GPP_VGPIO32, NONE),
58 /* GPP_V33 : [] ==> BT_I2S_SDI */
59 PAD_NC(GPP_VGPIO33, NONE),
60 /* GPP_V34 : [] ==> SSP2_SCLK */
61 PAD_NC(GPP_VGPIO34, NONE),
62 /* GPP_V35 : [] ==> SSP2_SFRM */
63 PAD_NC(GPP_VGPIO35, NONE),
64 /* GPP_V36 : [] ==> SSP_TXD */
65 PAD_NC(GPP_VGPIO36, NONE),
66 /* GPP_V37 : [] ==> SSP_RXD */
67 PAD_NC(GPP_VGPIO37, NONE),
68};
69
Kun Liud3ff66d2023-12-11 11:15:28 +0800[diff] [blame^]70static const struct pad_config usb_oc2_gpio_pads[] = {
71 PAD_CFG_NF_LOCK(GPP_B14, UP_20K, NF1, LOCK_CONFIG),
72};
73
Terry Cheong03807ac2023-12-07 19:39:41 +0800[diff] [blame]74void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
75{
Kun Liud3ff66d2023-12-11 11:15:28 +0800[diff] [blame^]76 uint32_t id = 0;
77 google_chromeec_get_board_version(&id);
78 if (id == 2 || id == 1) {
79 printk(BIOS_INFO, "Configure GPIOs for evt and dvt1.\n");
80 GPIO_PADBASED_OVERRIDE(padbased_table, usb_oc2_gpio_pads);
81 }
82
Terry Cheong03807ac2023-12-07 19:39:41 +0800[diff] [blame]83 if (!fw_config_is_provisioned()) {
84 GPIO_PADBASED_OVERRIDE(padbased_table, i2s_disable_pads);
85 GPIO_PADBASED_OVERRIDE(padbased_table, dmic_disable_pads);
86 GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_disable_pads);
87 return;
88 }
89
90 if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
91 printk(BIOS_INFO, "Configure GPIOs for no audio.\n");
92 GPIO_PADBASED_OVERRIDE(padbased_table, i2s_disable_pads);
93 GPIO_PADBASED_OVERRIDE(padbased_table, dmic_disable_pads);
94 GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_disable_pads);
95 } else if (fw_config_probe(FW_CONFIG(AUDIO, ALC1019_ALC5682I_I2S))) {
96 printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n");
97 GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads);
98 }
99}