Varshit Pandya | 970d770 | 2023-10-06 18:14:02 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <device/mmio.h> |
| 4 | #include <amdblocks/gpio.h> |
| 5 | #include <amdblocks/uart.h> |
| 6 | #include <commonlib/helpers.h> |
| 7 | #include <soc/aoac_defs.h> |
| 8 | #include <soc/gpio.h> |
| 9 | #include <soc/iomap.h> |
| 10 | #include <soc/southbridge.h> |
| 11 | #include <soc/uart.h> |
| 12 | #include <types.h> |
| 13 | |
| 14 | static const struct soc_uart_ctrlr_info uart_info[] = { |
| 15 | [0] = { APU_UART0_BASE, FCH_AOAC_DEV_UART0, "FUR0", { |
| 16 | PAD_NF(GPIO_136, UART0_RXD, PULL_NONE), |
| 17 | PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), |
| 18 | } }, |
| 19 | [1] = { APU_UART1_BASE, FCH_AOAC_DEV_UART1, "FUR1", { |
| 20 | PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), |
| 21 | PAD_NF(GPIO_142, UART1_TXD, PULL_NONE), |
| 22 | } }, |
| 23 | [2] = { APU_UART2_BASE, FCH_AOAC_DEV_UART2, "FUR2", { |
| 24 | PAD_NF(GPIO_137, UART2_RXD, PULL_NONE), |
| 25 | PAD_NF(GPIO_135, UART2_TXD, PULL_NONE), |
| 26 | } }, |
| 27 | }; |
| 28 | |
| 29 | const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs) |
| 30 | { |
| 31 | *num_ctrlrs = ARRAY_SIZE(uart_info); |
| 32 | return uart_info; |
| 33 | } |
| 34 | |
| 35 | void clear_uart_legacy_config(void) |
| 36 | { |
| 37 | write16((void *)FCH_LEGACY_UART_DECODE, 0); |
| 38 | } |