Arthur Heymans | 2e2f166 | 2023-07-14 22:58:49 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include <acpi/acpi.h> |
| 4 | #include <amdblocks/acpi.h> |
| 5 | #include <amdblocks/acpimmio.h> |
| 6 | #include <amdblocks/psp.h> |
| 7 | #include <amdblocks/smi.h> |
| 8 | #include <amdblocks/smm.h> |
| 9 | #include <arch/hlt.h> |
| 10 | #include <arch/io.h> |
| 11 | #include <console/console.h> |
| 12 | #include <cpu/x86/cache.h> |
| 13 | #include <cpu/x86/smm.h> |
| 14 | #include <elog.h> |
| 15 | #include <soc/smi.h> |
| 16 | #include <soc/smu.h> |
| 17 | #include <soc/southbridge.h> |
| 18 | #include <types.h> |
| 19 | |
| 20 | /* |
| 21 | * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register |
| 22 | * during the SMN accesses. Since the SMI handler is the last thing that gets called before |
| 23 | * entering S3, this won't interfere with any indirect SMN accesses via the same register pair. |
| 24 | */ |
| 25 | static void fch_slp_typ_handler(void) |
| 26 | { |
| 27 | uint32_t pci_ctrl; |
| 28 | uint16_t pm1cnt; |
| 29 | uint8_t slp_typ, rst_ctrl; |
| 30 | |
| 31 | /* Figure out SLP_TYP */ |
| 32 | pm1cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK); |
| 33 | printk(BIOS_SPEW, "SMI#: SLP = 0x%04x\n", pm1cnt); |
| 34 | slp_typ = acpi_sleep_from_pm1(pm1cnt); |
| 35 | |
| 36 | /* Do any mainboard sleep handling */ |
| 37 | mainboard_smi_sleep(slp_typ); |
| 38 | |
| 39 | switch (slp_typ) { |
| 40 | case ACPI_S0: |
| 41 | printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n"); |
| 42 | break; |
| 43 | case ACPI_S3: |
| 44 | printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n"); |
| 45 | break; |
| 46 | case ACPI_S4: |
| 47 | printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); |
| 48 | break; |
| 49 | case ACPI_S5: |
| 50 | printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n"); |
| 51 | break; |
| 52 | default: |
| 53 | printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n"); |
| 54 | break; |
| 55 | } |
| 56 | |
| 57 | if (slp_typ >= ACPI_S3) { |
| 58 | wbinvd(); |
| 59 | |
| 60 | clear_all_smi_status(); |
| 61 | |
| 62 | /* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */ |
| 63 | pci_ctrl = pm_read32(PM_PCI_CTRL); |
| 64 | pci_ctrl &= ~FORCE_SLPSTATE_RETRY; |
| 65 | pm_write32(PM_PCI_CTRL, pci_ctrl); |
| 66 | |
| 67 | /* Enable SlpTyp */ |
| 68 | rst_ctrl = pm_read8(PM_RST_CTRL1); |
| 69 | rst_ctrl |= SLPTYPE_CONTROL_EN; |
| 70 | pm_write8(PM_RST_CTRL1, rst_ctrl); |
| 71 | |
| 72 | smu_sx_entry(); /* Leave SlpTypeEn clear, SMU will set */ |
| 73 | printk(BIOS_ERR, "System did not go to sleep\n"); |
| 74 | hlt(); |
| 75 | } |
| 76 | } |
| 77 | |
| 78 | /* |
| 79 | * Table of functions supported in the SMI handler. Note that SMI source setup |
| 80 | * in fch.c is unrelated to this list. |
| 81 | */ |
| 82 | static const struct smi_sources_t smi_sources[] = { |
| 83 | { .type = SMITYPE_SMI_CMD_PORT, .handler = fch_apmc_smi_handler }, |
| 84 | { .type = SMITYPE_SLP_TYP, .handler = fch_slp_typ_handler}, |
| 85 | }; |
| 86 | |
| 87 | void *get_smi_source_handler(int source) |
| 88 | { |
| 89 | size_t i; |
| 90 | |
| 91 | for (i = 0 ; i < ARRAY_SIZE(smi_sources) ; i++) |
| 92 | if (smi_sources[i].type == source) |
| 93 | return smi_sources[i].handler; |
| 94 | |
| 95 | return NULL; |
| 96 | } |