Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
Patrick Georgi | b890a12 | 2015-03-26 15:17:45 +0100 | [diff] [blame] | 18 | * Foundation, Inc. |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include <console/console.h> |
| 22 | #include <device/device.h> |
| 23 | #include <device/path.h> |
| 24 | #include <device/smbus.h> |
| 25 | #include <device/pci.h> |
| 26 | #include <device/pci_ids.h> |
| 27 | #include <device/pci_ops.h> |
| 28 | #include <arch/io.h> |
| 29 | #include "pch.h" |
| 30 | #include "smbus.h" |
| 31 | |
| 32 | static void pch_smbus_init(device_t dev) |
| 33 | { |
| 34 | struct resource *res; |
| 35 | u16 reg16; |
| 36 | |
| 37 | /* Enable clock gating */ |
| 38 | reg16 = pci_read_config32(dev, 0x80); |
| 39 | reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14)); |
| 40 | pci_write_config32(dev, 0x80, reg16); |
| 41 | |
| 42 | /* Set Receive Slave Address */ |
| 43 | res = find_resource(dev, PCI_BASE_ADDRESS_4); |
| 44 | if (res) |
| 45 | outb(SMBUS_SLAVE_ADDR, res->base + SMB_RCV_SLVA); |
| 46 | } |
| 47 | |
| 48 | static int lsmbus_read_byte(device_t dev, u8 address) |
| 49 | { |
| 50 | u16 device; |
| 51 | struct resource *res; |
| 52 | struct bus *pbus; |
| 53 | |
| 54 | device = dev->path.i2c.device; |
| 55 | pbus = get_pbus_smbus(dev); |
Duncan Laurie | 8870733 | 2013-07-15 09:07:20 -0700 | [diff] [blame] | 56 | res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 57 | |
| 58 | return do_smbus_read_byte(res->base, device, address); |
| 59 | } |
| 60 | |
Duncan Laurie | 8870733 | 2013-07-15 09:07:20 -0700 | [diff] [blame] | 61 | static int do_smbus_write_byte(unsigned smbus_base, unsigned device, |
| 62 | unsigned address, unsigned data) |
| 63 | { |
| 64 | unsigned char global_status_register; |
| 65 | |
| 66 | if (smbus_wait_until_ready(smbus_base) < 0) |
| 67 | return SMBUS_WAIT_UNTIL_READY_TIMEOUT; |
| 68 | |
| 69 | /* Setup transaction */ |
| 70 | /* Disable interrupts */ |
| 71 | outb(inb(smbus_base + SMBHSTCTL) & (~1), smbus_base + SMBHSTCTL); |
| 72 | /* Set the device I'm talking too */ |
| 73 | outb(((device & 0x7f) << 1) & ~0x01, smbus_base + SMBXMITADD); |
| 74 | /* Set the command/address... */ |
| 75 | outb(address & 0xff, smbus_base + SMBHSTCMD); |
| 76 | /* Set up for a byte data read */ |
| 77 | outb((inb(smbus_base + SMBHSTCTL) & 0xe3) | (0x2 << 2), |
| 78 | (smbus_base + SMBHSTCTL)); |
| 79 | /* Clear any lingering errors, so the transaction will run */ |
| 80 | outb(inb(smbus_base + SMBHSTSTAT), smbus_base + SMBHSTSTAT); |
| 81 | |
| 82 | /* Clear the data byte... */ |
| 83 | outb(data, smbus_base + SMBHSTDAT0); |
| 84 | |
| 85 | /* Start the command */ |
| 86 | outb((inb(smbus_base + SMBHSTCTL) | 0x40), |
| 87 | smbus_base + SMBHSTCTL); |
| 88 | |
| 89 | /* Poll for transaction completion */ |
| 90 | if (smbus_wait_until_done(smbus_base) < 0) { |
| 91 | printk(BIOS_ERR, "SMBUS transaction timeout\n"); |
| 92 | return SMBUS_WAIT_UNTIL_DONE_TIMEOUT; |
| 93 | } |
| 94 | |
| 95 | global_status_register = inb(smbus_base + SMBHSTSTAT); |
| 96 | |
| 97 | /* Ignore the "In Use" status... */ |
| 98 | global_status_register &= ~(3 << 5); |
| 99 | |
| 100 | /* Read results of transaction */ |
| 101 | if (global_status_register != (1 << 1)) { |
| 102 | printk(BIOS_ERR, "SMBUS transaction error\n"); |
| 103 | return SMBUS_ERROR; |
| 104 | } |
| 105 | |
| 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | static int lsmbus_write_byte(device_t dev, u8 address, u8 data) |
| 110 | { |
| 111 | u16 device; |
| 112 | struct resource *res; |
| 113 | struct bus *pbus; |
| 114 | |
| 115 | device = dev->path.i2c.device; |
| 116 | pbus = get_pbus_smbus(dev); |
| 117 | res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4); |
| 118 | return do_smbus_write_byte(res->base, device, address, data); |
| 119 | } |
| 120 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 121 | static struct smbus_bus_operations lops_smbus_bus = { |
| 122 | .read_byte = lsmbus_read_byte, |
Duncan Laurie | 8870733 | 2013-07-15 09:07:20 -0700 | [diff] [blame] | 123 | .write_byte = lsmbus_write_byte, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 124 | }; |
| 125 | |
| 126 | static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device) |
| 127 | { |
| 128 | if (!vendor || !device) { |
| 129 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 130 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 131 | } else { |
| 132 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 133 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 134 | } |
| 135 | } |
| 136 | |
| 137 | static struct pci_operations smbus_pci_ops = { |
| 138 | .set_subsystem = smbus_set_subsystem, |
| 139 | }; |
| 140 | |
| 141 | static void smbus_read_resources(device_t dev) |
| 142 | { |
| 143 | struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4); |
| 144 | res->base = SMBUS_IO_BASE; |
| 145 | res->size = 32; |
| 146 | res->limit = res->base + res->size - 1; |
| 147 | res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | |
| 148 | IORESOURCE_STORED | IORESOURCE_ASSIGNED; |
| 149 | |
| 150 | /* Also add MMIO resource */ |
| 151 | res = pci_get_resource(dev, PCI_BASE_ADDRESS_0); |
| 152 | } |
| 153 | |
| 154 | static struct device_operations smbus_ops = { |
| 155 | .read_resources = smbus_read_resources, |
| 156 | .set_resources = pci_dev_set_resources, |
| 157 | .enable_resources = pci_dev_enable_resources, |
Kyösti Mälkki | d0e212c | 2015-02-26 20:47:47 +0200 | [diff] [blame^] | 158 | .scan_bus = scan_smbus, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 159 | .init = pch_smbus_init, |
| 160 | .ops_smbus_bus = &lops_smbus_bus, |
| 161 | .ops_pci = &smbus_pci_ops, |
| 162 | }; |
| 163 | |
Duncan Laurie | 8870733 | 2013-07-15 09:07:20 -0700 | [diff] [blame] | 164 | static const unsigned short pci_device_ids[] = { 0x1c22, 0x1e22, 0x9c22, 0 }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 165 | |
| 166 | static const struct pci_driver pch_smbus __pci_driver = { |
| 167 | .ops = &smbus_ops, |
| 168 | .vendor = PCI_VENDOR_ID_INTEL, |
| 169 | .devices = pci_device_ids, |
| 170 | }; |