| Frans Hendriks | 43b6e2e | 2019-06-04 13:53:05 +0200 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2018-2019 Eltan B.V. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | |
| 16 | if BOARD_FACEBOOK_FBG1701 |
| 17 | |
| 18 | config BOARD_SPECIFIC_OPTIONS |
| 19 | def_bool y |
| 20 | select BOARD_ROMSIZE_KB_8192 |
| 21 | select HAVE_ACPI_TABLES |
| 22 | select HAVE_OPTION_TABLE |
| 23 | select MAINBOARD_HAS_LPC_TPM |
| 24 | select MAINBOARD_HAS_TPM2 |
| 25 | select SOC_INTEL_BRASWELL |
| Frans Hendriks | d073a0b | 2019-08-01 14:25:11 +0200 | [diff] [blame^] | 26 | select SOC_INTEL_COMMON_BLOCK_HDA_VERB |
| Frans Hendriks | 43b6e2e | 2019-06-04 13:53:05 +0200 | [diff] [blame] | 27 | select PCIEXP_L1_SUB_STATE |
| 28 | select HAVE_FSP_BIN |
| 29 | select CACHE_MRC_SETTINGS |
| 30 | select DISABLE_HPET |
| Frans Hendriks | 6a27e76 | 2019-07-26 08:46:03 +0200 | [diff] [blame] | 31 | select INTEL_GMA_HAVE_VBT |
| Frans Hendriks | 43b6e2e | 2019-06-04 13:53:05 +0200 | [diff] [blame] | 32 | select GENERIC_SPD_BIN |
| 33 | |
| 34 | choice |
| 35 | prompt "Onboard memory manufacturer" |
| 36 | default ONBOARD_MICRON_MEM |
| 37 | |
| 38 | config ONBOARD_SAMSUNG_MEM |
| 39 | bool "Samsung" |
| 40 | help |
| 41 | Samsung K4B8G1646D memory |
| 42 | |
| 43 | config ONBOARD_MICRON_MEM |
| 44 | bool "Micron" |
| 45 | help |
| 46 | Micron MT41K512M16HA memory |
| 47 | endchoice |
| 48 | |
| 49 | config MAINBOARD_DIR |
| 50 | string |
| 51 | default facebook/fbg1701 |
| 52 | |
| 53 | config MAINBOARD_PART_NUMBER |
| 54 | string |
| 55 | default "FBG-1701" |
| 56 | |
| 57 | config CBFS_SIZE |
| 58 | hex |
| Frans Hendriks | 3b42683 | 2019-06-24 11:30:39 +0200 | [diff] [blame] | 59 | default 0x00600000 |
| Frans Hendriks | 43b6e2e | 2019-06-04 13:53:05 +0200 | [diff] [blame] | 60 | |
| 61 | config CPU_MICROCODE_CBFS_LEN |
| 62 | hex |
| 63 | default 0x10C00 |
| 64 | help |
| 65 | This should be updated when the microcode patch changes. |
| 66 | |
| 67 | config CPU_MICROCODE_CBFS_LOC |
| 68 | hex |
| 69 | default 0xFFFE9400 |
| 70 | |
| 71 | config MRC_SETTINGS_CACHE_SIZE |
| 72 | hex |
| 73 | default 0x08000 |
| 74 | |
| 75 | config FSP_LOC |
| 76 | hex |
| 77 | default 0xfff9c000 |
| 78 | |
| 79 | config FSP1_1_DISPLAY_LOGO |
| 80 | bool |
| 81 | default n |
| 82 | |
| Frans Hendriks | 43b6e2e | 2019-06-04 13:53:05 +0200 | [diff] [blame] | 83 | config SPI_FLASH_INCLUDE_ALL_DRIVERS |
| 84 | bool |
| 85 | default n |
| 86 | |
| 87 | config SPI_FLASH_WINBOND |
| 88 | bool |
| 89 | default y |
| 90 | |
| 91 | config TPM_INIT |
| 92 | bool "TPM Setup in RAMSTAGE" |
| 93 | default n |
| 94 | |
| 95 | config C_ENV_BOOTBLOCK_SIZE |
| 96 | hex "C Bootblock Size" |
| 97 | default 0x4000 |
| 98 | |
| 99 | endif # BOARD_FACEBOOK_FBG1701 |