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review.coreboot.org / coreboot / d0037efda9e9ce855279d21b891d29edbfb664fb / . / src / soc / mediatek / mt8188 / Makefile.mk
blob: 14f7d38e3baecaa51b18aa3db4c9402200a134a5 [file] [log] [blame]
Martin Roth9231f0b2022-10-28 22:39:23 -0600[diff] [blame]1## SPDX-License-Identifier: GPL-2.0-only
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]2ifeq ($(CONFIG_SOC_MEDIATEK_MT8188),y)
3
Rex-BC Chenf6155762022-06-13 19:10:02 +0800[diff] [blame]4all-y += ../common/flash_controller.c
Guodong Liuccaafdf2022-06-11 10:37:47 +0800[diff] [blame]5all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
kewei.xu2680eec2022-06-28 17:33:04 +0800[diff] [blame]6all-y += ../common/i2c.c i2c.c
garmin chang4e8a1ec2022-06-08 14:20:58 +0800[diff] [blame]7all-y += ../common/pll.c pll.c
Liya Li0d13e802022-07-23 14:23:04 +0800[diff] [blame]8all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
Yidi Lindb95b242023-08-02 12:48:04 +0800[diff] [blame]9all-y += timer.c ../common/timer_prepare.c
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]10all-y += ../common/uart.c
11
Yidi Linc68176c2024-01-16 15:08:41 +0800[diff] [blame]12bootblock-y += ../common/bootblock.c bootblock.c
Johnson Wang159e64c2022-11-11 17:31:49 +0800[diff] [blame]13bootblock-y += ../common/eint_event.c
ot_zhenguo.li6bd9d952023-02-24 13:55:27 +0800[diff] [blame]14bootblock-y += ../common/lastbus_v2.c lastbus.c
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]15bootblock-y += ../common/mmu_operations.c
Rex-BC Chen1dcc6692022-08-04 15:21:48 +0800[diff] [blame]16bootblock-y += ../common/tracker.c ../common/tracker_v2.c
Bo-Chen Chen22d30c42022-07-04 19:46:33 +0800[diff] [blame]17bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]18
19romstage-y += ../common/cbmem.c
Song Fan86dde5f2022-07-25 18:27:44 +0800[diff] [blame]20romstage-y += ../common/clkbuf.c
Xi Chen22ce1e82022-07-28 13:43:51 +0800[diff] [blame]21romstage-y += ../common/dram_init.c
22romstage-y += ../common/dramc_param.c
Xi Chen3729b1c2022-08-15 10:18:04 +0800[diff] [blame]23romstage-y += ../common/emi.c
Xi Chen22ce1e82022-07-28 13:43:51 +0800[diff] [blame]24romstage-y += ../common/memory.c
25romstage-y += ../common/memory_test.c
Rex-BC Chen29f18662022-06-15 11:49:16 +0800[diff] [blame]26romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
Hui Liuf1d9e422022-07-05 14:59:03 +0800[diff] [blame]27romstage-y += ../common/mt6315.c mt6315.c
28romstage-y += ../common/mt6359p.c mt6359p.c
29romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c
30romstage-y += ../common/pmif_spi.c pmif_spi.c
31romstage-y += ../common/pmif_spmi.c pmif_spmi.c
Song Fan11089e22022-07-25 18:18:35 +0800[diff] [blame]32romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]33
Hui Liufeb573e2022-07-25 14:51:36 +0800[diff] [blame]34ramstage-y += ../common/auxadc.c
Bo-Chen Chenbc18fb32022-09-06 14:41:57 +0800[diff] [blame]35ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
Liju-Clr Chen5ab991d2022-11-01 10:35:33 +0800[diff] [blame]36ramstage-y += cpu_input_gating.c
Nathan Lu4ac85982022-09-26 14:11:32 +0800[diff] [blame]37ramstage-y += ../common/ddp.c ddp.c
Nina Wuc0797f52022-08-18 11:13:31 +0800[diff] [blame]38ramstage-y += ../common/devapc.c devapc.c
Rex-BC Chenc3d2e9c2022-08-04 17:11:22 +0800[diff] [blame]39ramstage-y += ../common/dfd.c
Yidi Linba604b52024-01-03 16:07:24 +0800[diff] [blame]40ramstage-y += ../common/display.c
Bo-Chen Chen8a604bd2022-09-29 17:31:23 +0800[diff] [blame]41ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c
Xi Chendf039612022-08-18 11:23:26 +0800[diff] [blame]42ramstage-y += ../common/dpm.c
43ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
Bo-Chen Chen35693c52022-11-23 17:24:25 +0800[diff] [blame]44ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c
Xi Chen3729b1c2022-08-15 10:18:04 +0800[diff] [blame]45ramstage-y += ../common/emi.c
Rex-BC Chen0c7a0f92022-07-22 11:09:55 +0800[diff] [blame]46ramstage-y += ../common/mcu.c
47ramstage-y += ../common/mcupm.c
Rex-BC Chen29f18662022-06-15 11:49:16 +0800[diff] [blame]48ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
Andy-ld Lueb2a1112022-07-13 21:10:16 +0800[diff] [blame]49ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
Hui Liu8ba3e342022-07-15 13:58:09 +0800[diff] [blame]50ramstage-y += ../common/mt6359p.c mt6359p.c
Bo-Chen Chenf09872c2022-09-29 18:45:37 +0800[diff] [blame]51ramstage-y += ../common/mtcmos.c mtcmos.c
Hui Liu8ba3e342022-07-15 13:58:09 +0800[diff] [blame]52ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c
53ramstage-y += ../common/pmif_spi.c pmif_spi.c
Rex-BC Chend7b74602023-01-17 11:04:58 +0800[diff] [blame]54ramstage-y += ../common/pmif_spmi.c pmif_spmi.c
Liju-Clr Chenc5b32ee2022-11-10 16:51:45 +0800[diff] [blame]55ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]56ramstage-y += soc.c
Rex-BC Chenc23235e2022-08-10 18:23:01 +0800[diff] [blame]57ramstage-y += ../common/spm.c spm.c
Rex-BC Chen202f60b2022-07-22 13:41:45 +0800[diff] [blame]58ramstage-y += ../common/sspm.c
Ruihai Zhou4a604182023-05-29 20:27:06 +0800[diff] [blame]59ramstage-y += ../common/tps65132s.c
Shaocheng Wang15e5a3b2022-07-05 15:41:18 +0800[diff] [blame]60ramstage-y += ../common/usb.c usb.c
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]61
kiwi liu4bd12362023-11-01 15:07:33 +0800[diff] [blame]62BL31_MAKEARGS += PLAT=mt8188 SPD=opteed
63BL31_MAKEARGS += OPTEE_ALLOW_SMC_LOAD=1 PLAT_XLAT_TABLES_DYNAMIC=1
Rex-BC Chen73296532022-07-07 17:29:19 +0800[diff] [blame]64
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]65CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include
Bo-Chen Chen8a604bd2022-09-29 17:31:23 +0800[diff] [blame]66CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]67CPPFLAGS_common += -Isrc/soc/mediatek/common/include
68
Rex-BC Chen0c7a0f92022-07-22 11:09:55 +0800[diff] [blame]69MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188
70
71mcu-firmware-files := \
Xi Chencd373682022-08-18 11:46:18 +0800[diff] [blame]72 $(CONFIG_DPM_DM_FIRMWARE) \
73 $(CONFIG_DPM_PM_FIRMWARE) \
Rex-BC Chen202f60b2022-07-22 13:41:45 +0800[diff] [blame]74 $(CONFIG_MCUPM_FIRMWARE) \
Rex-BC Chenc23235e2022-08-10 18:23:01 +0800[diff] [blame]75 $(CONFIG_SPM_FIRMWARE) \
Rex-BC Chen202f60b2022-07-22 13:41:45 +0800[diff] [blame]76 $(CONFIG_SSPM_FIRMWARE)
Rex-BC Chen0c7a0f92022-07-22 11:09:55 +0800[diff] [blame]77
78$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
79 $(eval $(fw)-file := $(MT8188_BLOB_DIR)/$(fw)) \
80 $(eval $(fw)-type := raw) \
81 $(eval $(fw)-compression := LZ4) \
82 $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \
83)
84
Xi Chen22ce1e82022-07-28 13:43:51 +0800[diff] [blame]85DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram
86$(DRAM_CBFS)-file := $(MT8188_BLOB_DIR)/dram.elf
87$(DRAM_CBFS)-type := stage
88$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
89ifneq ($(wildcard $($(DRAM_CBFS)-file)),)
90 cbfs-files-y += $(DRAM_CBFS)
91endif
92
Rex-BC Chen3f83c6f2022-05-24 19:45:59 +0800[diff] [blame]93$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
94 ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
95
96endif