blob: 0cc89d0222a331da205e636271ee124ce6b82e52 [file] [log] [blame]
jinkun.hongac490b82014-06-22 20:40:39 -07001##
2## This file is part of the coreboot project.
3##
4## Copyright 2014 Rockchip Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
David Hendricks580bcff2014-09-29 13:20:59 -070019bootblock-y += bootblock.c
Julius Werner8f3883d2014-09-26 21:01:08 -070020bootblock-y += boardid.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070021bootblock-y += chromeos.c
Daisuke Nojiriaee84262014-09-23 15:47:30 -070022bootblock-y += reset.c
23
Julius Werner8f3883d2014-09-26 21:01:08 -070024verstage-y += boardid.c
Daisuke Nojiri5c2988c2014-09-24 09:39:16 -070025verstage-y += chromeos.c
Daisuke Nojiriaee84262014-09-23 15:47:30 -070026verstage-y += reset.c
jinkun.hongac490b82014-06-22 20:40:39 -070027
Julius Werner8f3883d2014-09-26 21:01:08 -070028romstage-y += boardid.c
jinkun.hongac490b82014-06-22 20:40:39 -070029romstage-y += romstage.c
huang lin739df1b2014-08-27 17:07:42 +080030romstage-y += chromeos.c
Jinkun Hongc33ce352014-08-28 09:37:22 -070031romstage-y += sdram_configs.c
Daisuke Nojiriaee84262014-09-23 15:47:30 -070032romstage-y += reset.c
Julius Werner72001e72014-09-10 15:30:49 -070033
34ramstage-y += boardid.c
huang lin739df1b2014-08-27 17:07:42 +080035ramstage-y += chromeos.c
jinkun.hongac490b82014-06-22 20:40:39 -070036ramstage-y += mainboard.c
Daisuke Nojiriaee84262014-09-23 15:47:30 -070037ramstage-y += reset.c
Julius Wernerec5e5e02014-08-20 15:29:56 -070038
39bootblock-y += memlayout.ld
40verstage-y += memlayout.ld
41romstage-y += memlayout.ld
42ramstage-y += memlayout.ld