Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * coreboot ACPI support - headers and defines. |
| 5 | */ |
| 6 | |
Furquan Shaikh | 56eafbb | 2020-04-30 18:38:55 -0700 | [diff] [blame] | 7 | #ifndef __ACPI_ACPI_H__ |
| 8 | #define __ACPI_ACPI_H__ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 9 | |
| 10 | /* |
| 11 | * The type and enable fields are common in ACPI, but the |
| 12 | * values themselves are hardware implementation defined. |
| 13 | */ |
| 14 | #if CONFIG(ACPI_INTEL_HARDWARE_SLEEP_VALUES) |
| 15 | #define SLP_EN (1 << 13) |
| 16 | #define SLP_TYP_SHIFT 10 |
| 17 | #define SLP_TYP (7 << SLP_TYP_SHIFT) |
| 18 | #define SLP_TYP_S0 0 |
| 19 | #define SLP_TYP_S1 1 |
| 20 | #define SLP_TYP_S3 5 |
| 21 | #define SLP_TYP_S4 6 |
| 22 | #define SLP_TYP_S5 7 |
| 23 | #elif CONFIG(ACPI_AMD_HARDWARE_SLEEP_VALUES) |
| 24 | #define SLP_EN (1 << 13) |
| 25 | #define SLP_TYP_SHIFT 10 |
| 26 | #define SLP_TYP (7 << SLP_TYP_SHIFT) |
| 27 | #define SLP_TYP_S0 0 |
| 28 | #define SLP_TYP_S1 1 |
| 29 | #define SLP_TYP_S3 3 |
| 30 | #define SLP_TYP_S4 4 |
| 31 | #define SLP_TYP_S5 5 |
| 32 | #endif |
| 33 | |
| 34 | #define ACPI_TABLE_CREATOR "COREBOOT" /* Must be exactly 8 bytes long! */ |
| 35 | #define OEM_ID "COREv4" /* Must be exactly 6 bytes long! */ |
Elyes HAOUAS | 288426d | 2020-10-01 16:52:26 +0200 | [diff] [blame] | 36 | #define ACPI_DSDT_REV_1 0x01 /* DSDT revision: ACPI v1 */ |
Elyes HAOUAS | 7f53ec6 | 2020-10-05 16:33:52 +0200 | [diff] [blame] | 37 | #define ACPI_DSDT_REV_2 0x02 /* DSDT revision: ACPI v2.0 and greater */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 38 | |
| 39 | #if !defined(__ASSEMBLER__) && !defined(__ACPI__) |
| 40 | #include <commonlib/helpers.h> |
| 41 | #include <device/device.h> |
| 42 | #include <uuid.h> |
| 43 | #include <cper.h> |
Kyösti Mälkki | ac0dc4a | 2020-11-18 07:40:21 +0200 | [diff] [blame] | 44 | #include <romstage_handoff.h> |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 45 | #include <types.h> |
| 46 | |
Tim Wawrzynczak | 05a6d5c | 2021-11-24 09:54:59 -0700 | [diff] [blame] | 47 | enum acpi_device_sleep_states { |
| 48 | ACPI_DEVICE_SLEEP_D0 = 0, |
| 49 | ACPI_DEVICE_SLEEP_D1 = 1, |
| 50 | ACPI_DEVICE_SLEEP_D2 = 2, |
| 51 | ACPI_DEVICE_SLEEP_D3 = 3, |
| 52 | ACPI_DEVICE_SLEEP_D3_HOT = ACPI_DEVICE_SLEEP_D3, |
| 53 | ACPI_DEVICE_SLEEP_D3_COLD = 4, |
Eran Mitrani | 4c9440c | 2022-11-29 17:46:38 -0800 | [diff] [blame] | 54 | ACPI_DEVICE_SLEEP_NONE = 5, |
Tim Wawrzynczak | 05a6d5c | 2021-11-24 09:54:59 -0700 | [diff] [blame] | 55 | }; |
| 56 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 57 | #define RSDP_SIG "RSD PTR " /* RSDT pointer signature */ |
| 58 | #define ASLC "CORE" /* Must be exactly 4 bytes long! */ |
| 59 | |
Raul E Rangel | 1c0b9f2 | 2020-07-09 11:58:38 -0600 | [diff] [blame] | 60 | #define ACPI_NAME_BUFFER_SIZE 5 /* 4 chars + 1 NUL */ |
| 61 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 62 | /* |
| 63 | * The assigned ACPI ID for the coreboot project is 'BOOT' |
| 64 | * http://www.uefi.org/acpi_id_list |
| 65 | */ |
| 66 | #define COREBOOT_ACPI_ID "BOOT" /* ACPI ID for coreboot HIDs */ |
| 67 | |
| 68 | /* List of ACPI HID that use the coreboot ACPI ID */ |
| 69 | enum coreboot_acpi_ids { |
| 70 | COREBOOT_ACPI_ID_CBTABLE = 0x0000, /* BOOT0000 */ |
CoolStar | c7b27b3 | 2023-07-10 18:03:40 -0700 | [diff] [blame] | 71 | COREBOOT_ACPI_ID_IGD_GMBUS_ARB = 0x0001, /* BOOT0001 */ |
| 72 | COREBOOT_ACPI_ID_IGD_GMBUS_LINK = 0x0002, /* BOOT0002 */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 73 | COREBOOT_ACPI_ID_MAX = 0xFFFF, /* BOOTFFFF */ |
| 74 | }; |
| 75 | |
| 76 | enum acpi_tables { |
| 77 | /* Tables defined by ACPI and used by coreboot */ |
Jonathan Zhang | 3dcafa8 | 2022-05-11 13:11:20 -0700 | [diff] [blame] | 78 | BERT, CEDT, DBG2, DMAR, DSDT, EINJ, FACS, FADT, HEST, HMAT, HPET, IVRS, |
| 79 | MADT, MCFG, RSDP, RSDT, SLIT, SRAT, SSDT, TCPA, TPM2, XSDT, ECDT, LPIT, |
Arthur Heymans | 2e3cb63 | 2023-06-30 15:01:08 +0200 | [diff] [blame] | 80 | SPCR, GTDT, |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 81 | /* Additional proprietary tables used by coreboot */ |
Jason Glenesk | 61624b2 | 2020-11-02 20:06:23 -0800 | [diff] [blame] | 82 | VFCT, NHLT, SPMI, CRAT |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 83 | }; |
| 84 | |
| 85 | /* RSDP (Root System Description Pointer) */ |
| 86 | typedef struct acpi_rsdp { |
| 87 | char signature[8]; /* RSDP signature */ |
| 88 | u8 checksum; /* Checksum of the first 20 bytes */ |
| 89 | char oem_id[6]; /* OEM ID */ |
| 90 | u8 revision; /* RSDP revision */ |
| 91 | u32 rsdt_address; /* Physical address of RSDT (32 bits) */ |
| 92 | u32 length; /* Total RSDP length (incl. extended part) */ |
| 93 | u64 xsdt_address; /* Physical address of XSDT (64 bits) */ |
| 94 | u8 ext_checksum; /* Checksum of the whole table */ |
| 95 | u8 reserved[3]; |
| 96 | } __packed acpi_rsdp_t; |
| 97 | |
| 98 | /* GAS (Generic Address Structure) */ |
| 99 | typedef struct acpi_gen_regaddr { |
| 100 | u8 space_id; /* Address space ID */ |
| 101 | u8 bit_width; /* Register size in bits */ |
| 102 | u8 bit_offset; /* Register bit offset */ |
| 103 | u8 access_size; /* Access size since ACPI 2.0c */ |
| 104 | u32 addrl; /* Register address, low 32 bits */ |
| 105 | u32 addrh; /* Register address, high 32 bits */ |
| 106 | } __packed acpi_addr_t; |
| 107 | |
Elyes HAOUAS | 5f5fd85 | 2020-10-15 12:24:00 +0200 | [diff] [blame] | 108 | #define ACPI_ADDRESS_SPACE_MEMORY 0 /* System memory */ |
| 109 | #define ACPI_ADDRESS_SPACE_IO 1 /* System I/O */ |
| 110 | #define ACPI_ADDRESS_SPACE_PCI 2 /* PCI config space */ |
| 111 | #define ACPI_ADDRESS_SPACE_EC 3 /* Embedded controller */ |
| 112 | #define ACPI_ADDRESS_SPACE_SMBUS 4 /* SMBus */ |
| 113 | #define ACPI_ADDRESS_SPACE_CMOS 5 /* SystemCMOS */ |
| 114 | #define ACPI_ADDRESS_SPACE_PCI_BAR_TARGET 6 /* PciBarTarget */ |
| 115 | #define ACPI_ADDRESS_SPACE_IPMI 7 /* IPMI */ |
| 116 | #define ACPI_ADDRESS_SPACE_GENERAL_PURPOSE_IO 8 /* GeneralPurposeIO */ |
| 117 | #define ACPI_ADDRESS_SPACE_GENERIC_SERIAL_BUS 9 /* GenericSerialBus */ |
| 118 | #define ACPI_ADDRESS_SPACE_PCC 0x0A /* Platform Comm. Channel */ |
| 119 | #define ACPI_ADDRESS_SPACE_FIXED 0x7f /* Functional fixed hardware */ |
| 120 | #define ACPI_FFIXEDHW_VENDOR_INTEL 1 /* Intel */ |
| 121 | #define ACPI_FFIXEDHW_CLASS_HLT 0 /* C1 Halt */ |
| 122 | #define ACPI_FFIXEDHW_CLASS_IO_HLT 1 /* C1 I/O then Halt */ |
| 123 | #define ACPI_FFIXEDHW_CLASS_MWAIT 2 /* MWAIT Native C-state */ |
| 124 | #define ACPI_FFIXEDHW_FLAG_HW_COORD 1 /* Hardware Coordination bit */ |
| 125 | #define ACPI_FFIXEDHW_FLAG_BM_STS 2 /* BM_STS avoidance bit */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 126 | /* 0x80-0xbf: Reserved */ |
| 127 | /* 0xc0-0xff: OEM defined */ |
| 128 | |
| 129 | /* Access size definitions for Generic address structure */ |
| 130 | #define ACPI_ACCESS_SIZE_UNDEFINED 0 /* Undefined (legacy reasons) */ |
| 131 | #define ACPI_ACCESS_SIZE_BYTE_ACCESS 1 |
| 132 | #define ACPI_ACCESS_SIZE_WORD_ACCESS 2 |
| 133 | #define ACPI_ACCESS_SIZE_DWORD_ACCESS 3 |
| 134 | #define ACPI_ACCESS_SIZE_QWORD_ACCESS 4 |
| 135 | |
Michael Niewöhner | ab088c9 | 2021-09-23 17:04:35 +0200 | [diff] [blame] | 136 | /* Macros for common resource types */ |
| 137 | #define ACPI_REG_MSR(address, offset, width) \ |
Michael Niewöhner | f72c7b1 | 2021-10-05 21:42:57 +0200 | [diff] [blame] | 138 | (acpi_addr_t){ \ |
Michael Niewöhner | ab088c9 | 2021-09-23 17:04:35 +0200 | [diff] [blame] | 139 | .space_id = ACPI_ADDRESS_SPACE_FIXED, \ |
| 140 | .access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS, \ |
| 141 | .addrl = address, \ |
| 142 | .bit_offset = offset, \ |
| 143 | .bit_width = width, \ |
| 144 | } |
| 145 | |
Michael Niewöhner | f72c7b1 | 2021-10-05 21:42:57 +0200 | [diff] [blame] | 146 | #define ACPI_REG_UNSUPPORTED (acpi_addr_t){0} |
Michael Niewöhner | ab088c9 | 2021-09-23 17:04:35 +0200 | [diff] [blame] | 147 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 148 | /* Common ACPI HIDs */ |
| 149 | #define ACPI_HID_FDC "PNP0700" |
| 150 | #define ACPI_HID_KEYBOARD "PNP0303" |
| 151 | #define ACPI_HID_MOUSE "PNP0F03" |
| 152 | #define ACPI_HID_COM "PNP0501" |
| 153 | #define ACPI_HID_LPT "PNP0400" |
| 154 | #define ACPI_HID_PNP "PNP0C02" |
| 155 | #define ACPI_HID_CONTAINER "PNP0A05" |
| 156 | |
| 157 | /* Generic ACPI header, provided by (almost) all tables */ |
| 158 | typedef struct acpi_table_header { |
| 159 | char signature[4]; /* ACPI signature (4 ASCII characters) */ |
| 160 | u32 length; /* Table length in bytes (incl. header) */ |
| 161 | u8 revision; /* Table version (not ACPI version!) */ |
| 162 | u8 checksum; /* To make sum of entire table == 0 */ |
| 163 | char oem_id[6]; /* OEM identification */ |
| 164 | char oem_table_id[8]; /* OEM table identification */ |
| 165 | u32 oem_revision; /* OEM revision number */ |
| 166 | char asl_compiler_id[4]; /* ASL compiler vendor ID */ |
| 167 | u32 asl_compiler_revision; /* ASL compiler revision number */ |
| 168 | } __packed acpi_header_t; |
| 169 | |
| 170 | /* A maximum number of 32 ACPI tables ought to be enough for now. */ |
| 171 | #define MAX_ACPI_TABLES 32 |
| 172 | |
| 173 | /* RSDT (Root System Description Table) */ |
| 174 | typedef struct acpi_rsdt { |
| 175 | acpi_header_t header; |
| 176 | u32 entry[MAX_ACPI_TABLES]; |
| 177 | } __packed acpi_rsdt_t; |
| 178 | |
| 179 | /* XSDT (Extended System Description Table) */ |
| 180 | typedef struct acpi_xsdt { |
| 181 | acpi_header_t header; |
| 182 | u64 entry[MAX_ACPI_TABLES]; |
| 183 | } __packed acpi_xsdt_t; |
| 184 | |
| 185 | /* HPET timers */ |
| 186 | typedef struct acpi_hpet { |
| 187 | acpi_header_t header; |
| 188 | u32 id; |
| 189 | acpi_addr_t addr; |
| 190 | u8 number; |
| 191 | u16 min_tick; |
| 192 | u8 attributes; |
| 193 | } __packed acpi_hpet_t; |
| 194 | |
| 195 | /* MCFG (PCI Express MMIO config space BAR description table) */ |
| 196 | typedef struct acpi_mcfg { |
| 197 | acpi_header_t header; |
| 198 | u8 reserved[8]; |
| 199 | } __packed acpi_mcfg_t; |
| 200 | |
| 201 | typedef struct acpi_tcpa { |
| 202 | acpi_header_t header; |
| 203 | u16 platform_class; |
| 204 | u32 laml; |
| 205 | u64 lasa; |
| 206 | } __packed acpi_tcpa_t; |
| 207 | |
| 208 | typedef struct acpi_tpm2 { |
| 209 | acpi_header_t header; |
| 210 | u16 platform_class; |
| 211 | u8 reserved[2]; |
| 212 | u64 control_area; |
| 213 | u32 start_method; |
| 214 | u8 msp[12]; |
| 215 | u32 laml; |
| 216 | u64 lasa; |
| 217 | } __packed acpi_tpm2_t; |
| 218 | |
| 219 | typedef struct acpi_mcfg_mmconfig { |
Naresh Solanki | 4d0b184 | 2023-08-25 12:58:11 +0200 | [diff] [blame] | 220 | u64 base_address; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 221 | u16 pci_segment_group_number; |
| 222 | u8 start_bus_number; |
| 223 | u8 end_bus_number; |
| 224 | u8 reserved[4]; |
| 225 | } __packed acpi_mcfg_mmconfig_t; |
| 226 | |
Jonathan Zhang | 2a4e1f4 | 2021-04-01 11:43:37 -0700 | [diff] [blame] | 227 | /* |
Jonathan Zhang | 3dcafa8 | 2022-05-11 13:11:20 -0700 | [diff] [blame] | 228 | * CEDT (CXL Early Discovery Table) |
| 229 | * CXL spec 2.0 section 9.14.1 |
| 230 | */ |
| 231 | typedef struct acpi_cedt { |
| 232 | acpi_header_t header; |
| 233 | /* Followed by CEDT structures[n] */ |
| 234 | } __packed acpi_cedt_t; |
| 235 | |
| 236 | #define ACPI_CEDT_STRUCTURE_CHBS 0 |
| 237 | #define ACPI_CEDT_STRUCTURE_CFMWS 1 |
| 238 | |
| 239 | #define ACPI_CEDT_CHBS_CXL_VER_1_1 0x00 |
| 240 | #define ACPI_CEDT_CHBS_CXL_VER_2_0 0x01 |
| 241 | |
| 242 | /* CHBS: CXL Host Bridge Structure */ |
| 243 | typedef struct acpi_cedt_chbs { |
| 244 | u8 type; /* Always 0, other values reserved */ |
| 245 | u8 resv1; |
| 246 | u16 length; /* Length in bytes (32) */ |
| 247 | u32 uid; /* CXL Host Bridge Unique ID */ |
| 248 | u32 cxl_ver; |
| 249 | u32 resv2; |
| 250 | /* |
| 251 | * For CXL 1.1, the base is Downstream Port Root Complex Resource Block; |
| 252 | * For CXL 2.0, the base is CXL Host Bridge Component Registers. |
| 253 | */ |
| 254 | u64 base; |
| 255 | u64 len; |
| 256 | } __packed acpi_cedt_chbs_t; |
| 257 | |
| 258 | #define ACPI_CEDT_CFMWS_RESTRICTION_TYPE_2_MEM (1 << 0) |
| 259 | #define ACPI_CEDT_CFMWS_RESTRICTION_TYPE_3_MEM (1 << 1) |
| 260 | #define ACPI_CEDT_CFMWS_RESTRICTION_VOLATIL (1 << 2) |
| 261 | #define ACPI_CEDT_CFMWS_RESTRICTION_PERSISTENT (1 << 3) |
| 262 | #define ACPI_CEDT_CFMWS_RESTRICTION_FIXED (1 << 4) |
| 263 | |
| 264 | /* CFMWS: CXL Fixed Memory Window Structure */ |
| 265 | typedef struct acpi_cedt_cfmws { |
| 266 | u8 type; /* Type (0) */ |
| 267 | u8 resv1; |
| 268 | u16 length; /* Length in bytes (32) */ |
| 269 | u32 resv2; |
| 270 | u64 base_hpa; /* Base of the HPA range, 256MB aligned */ |
| 271 | u64 window_size; /* Number of bytes this window represents */ |
| 272 | u8 eniw; /* Encoded Number of Interleave Ways */ |
| 273 | u8 interleave_arithmetic; /* Standard Modulo arithmetic (0) */ |
| 274 | u16 resv3; |
| 275 | u32 hbig; /* Host Bridge Interleave Granularity */ |
| 276 | u16 restriction; |
| 277 | u16 qtg_id; |
| 278 | u32 interleave_target[]; /* Interleave Target List */ |
| 279 | } __packed acpi_cedt_cfmws_t; |
| 280 | |
| 281 | /* |
Jonathan Zhang | 2a4e1f4 | 2021-04-01 11:43:37 -0700 | [diff] [blame] | 282 | * HMAT (Heterogeneous Memory Attribute Table) |
| 283 | * ACPI spec 6.4 section 5.2.27 |
| 284 | */ |
| 285 | typedef struct acpi_hmat { |
| 286 | acpi_header_t header; |
| 287 | u32 resv; |
| 288 | /* Followed by HMAT table structure[n] */ |
| 289 | } __packed acpi_hmat_t; |
| 290 | |
| 291 | /* HMAT: Memory Proximity Domain Attributes structure */ |
| 292 | typedef struct acpi_hmat_mpda { |
| 293 | u16 type; /* Type (0) */ |
| 294 | u16 resv; |
| 295 | u32 length; /* Length in bytes (40) */ |
| 296 | u16 flags; |
| 297 | u16 resv1; |
| 298 | u32 proximity_domain_initiator; |
| 299 | u32 proximity_domain_memory; |
| 300 | u32 resv2; |
| 301 | u64 resv3; |
| 302 | u64 resv4; |
| 303 | } __packed acpi_hmat_mpda_t; |
| 304 | |
| 305 | /* HMAT: System Locality Latency and Bandwidth Information structure */ |
| 306 | typedef struct acpi_hmat_sllbi { |
| 307 | u16 type; /* Type (1) */ |
| 308 | u16 resv; |
| 309 | u32 length; /* Length in bytes */ |
| 310 | u8 flags; |
| 311 | u8 data_type; |
| 312 | /* |
| 313 | * Transfer size defined as a 5-biased power of 2 exponent, |
| 314 | * when the bandwidth/latency value is achieved. |
| 315 | */ |
| 316 | u8 min_transfer_size; |
| 317 | u8 resv1; |
| 318 | u32 num_initiator_domains; |
| 319 | u32 num_target_domains; |
| 320 | u32 resv2; |
| 321 | u64 entry_base_unit; |
| 322 | /* Followed by initiator proximity domain list */ |
| 323 | /* Followed by target proximity domain list */ |
| 324 | /* Followed by latency / bandwidth values */ |
| 325 | } __packed acpi_hmat_sllbi_t; |
| 326 | |
| 327 | /* HMAT: Memory Side Cache Information structure */ |
| 328 | typedef struct acpi_hmat_msci { |
| 329 | u16 type; /* Type (2) */ |
| 330 | u16 resv; |
| 331 | u32 length; /* Length in bytes */ |
| 332 | u32 domain; /* Proximity domain for the memory */ |
| 333 | u32 resv1; |
| 334 | u64 cache_size; |
| 335 | /* Describes level, associativity, write policy, cache line size */ |
| 336 | u32 cache_attributes; |
| 337 | u16 resv2; |
| 338 | /* |
| 339 | * Number of SMBIOS handlers that contribute to the |
| 340 | * memory side cache physical devices |
| 341 | */ |
| 342 | u16 num_handlers; |
| 343 | /* Followed by SMBIOS handlers*/ |
| 344 | } __packed acpi_hmat_msci_t; |
| 345 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 346 | /* SRAT (System Resource Affinity Table) */ |
| 347 | typedef struct acpi_srat { |
| 348 | acpi_header_t header; |
| 349 | u32 resv; |
| 350 | u64 resv1; |
| 351 | /* Followed by static resource allocation structure[n] */ |
| 352 | } __packed acpi_srat_t; |
| 353 | |
Jonathan Zhang | 3164b64 | 2021-04-21 17:51:31 -0700 | [diff] [blame] | 354 | #define ACPI_SRAT_STRUCTURE_LAPIC 0 |
| 355 | #define ACPI_SRAT_STRUCTURE_MEM 1 |
| 356 | #define ACPI_SRAT_STRUCTURE_GIA 5 |
| 357 | |
Naresh Solanki | 76835cc | 2023-01-20 19:13:02 +0100 | [diff] [blame] | 358 | /* SRAT: Processor x2APIC Structure */ |
| 359 | typedef struct acpi_srat_x2apic { |
| 360 | u8 type; /* Type (0) */ |
| 361 | u8 length; /* Length in bytes (16) */ |
| 362 | u16 reserved; /* Reserved - Must be zero */ |
| 363 | u32 proximity_domain; /* Proximity domain */ |
| 364 | u32 x2apic_id; /* x2APIC ID */ |
| 365 | u32 flags; /* Enable bit 0 = 1, other bits reserved to 0 */ |
| 366 | u32 clock_domain; /* _CDM Clock Domain */ |
| 367 | u32 reserved1; /* Reserved */ |
| 368 | } __packed acpi_srat_x2apic_t; |
| 369 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 370 | /* SRAT: Processor Local APIC/SAPIC Affinity Structure */ |
| 371 | typedef struct acpi_srat_lapic { |
| 372 | u8 type; /* Type (0) */ |
| 373 | u8 length; /* Length in bytes (16) */ |
| 374 | u8 proximity_domain_7_0; /* Proximity domain bits[7:0] */ |
| 375 | u8 apic_id; /* Local APIC ID */ |
| 376 | u32 flags; /* Enable bit 0 = 1, other bits reserved to 0 */ |
| 377 | u8 local_sapic_eid; /* Local SAPIC EID */ |
| 378 | u8 proximity_domain_31_8[3]; /* Proximity domain bits[31:8] */ |
| 379 | u32 clock_domain; /* _CDM Clock Domain */ |
| 380 | } __packed acpi_srat_lapic_t; |
| 381 | |
| 382 | /* SRAT: Memory Affinity Structure */ |
| 383 | typedef struct acpi_srat_mem { |
| 384 | u8 type; /* Type (1) */ |
| 385 | u8 length; /* Length in bytes (40) */ |
| 386 | u32 proximity_domain; /* Proximity domain */ |
| 387 | u16 resv; |
| 388 | u32 base_address_low; /* Mem range base address, low */ |
| 389 | u32 base_address_high; /* Mem range base address, high */ |
| 390 | u32 length_low; /* Mem range length, low */ |
| 391 | u32 length_high; /* Mem range length, high */ |
| 392 | u32 resv1; |
| 393 | u32 flags; /* Enable bit 0, hot pluggable bit 1; Non Volatile bit 2, |
| 394 | * other bits reserved to 0 |
| 395 | */ |
| 396 | u32 resv2[2]; |
| 397 | } __packed acpi_srat_mem_t; |
| 398 | |
Jonathan Zhang | 3164b64 | 2021-04-21 17:51:31 -0700 | [diff] [blame] | 399 | /* SRAT: Generic Initiator Affinity Structure (ACPI spec 6.4 section 5.2.16.6) */ |
| 400 | typedef struct acpi_srat_gia { |
| 401 | u8 type; /* Type (5) */ |
| 402 | u8 length; /* Length in bytes (32) */ |
| 403 | u8 resv; |
| 404 | u8 dev_handle_type; /* Device handle type */ |
| 405 | u32 proximity_domain; /*Proximity domain */ |
| 406 | u8 dev_handle[16]; /* Device handle */ |
| 407 | u32 flags; |
| 408 | u32 resv1; |
| 409 | } __packed acpi_srat_gia_t; |
| 410 | |
| 411 | #define ACPI_SRAT_GIA_DEV_HANDLE_ACPI 0 |
| 412 | #define ACPI_SRAT_GIA_DEV_HANDLE_PCI 1 |
| 413 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 414 | /* SLIT (System Locality Distance Information Table) */ |
| 415 | typedef struct acpi_slit { |
| 416 | acpi_header_t header; |
| 417 | /* Followed by static resource allocation 8+byte[num*num] */ |
| 418 | } __packed acpi_slit_t; |
| 419 | |
| 420 | /* MADT (Multiple APIC Description Table) */ |
| 421 | typedef struct acpi_madt { |
| 422 | acpi_header_t header; |
| 423 | u32 lapic_addr; /* Local APIC address */ |
| 424 | u32 flags; /* Multiple APIC flags */ |
| 425 | } __packed acpi_madt_t; |
| 426 | |
Michael Niewöhner | f0a44ae | 2021-01-01 21:04:09 +0100 | [diff] [blame] | 427 | /* |
| 428 | * LPIT (Low Power Idle Table) |
| 429 | * Conforms to "Intel Low Power S0 Idle" specification, rev 002 from July 2017. |
| 430 | */ |
| 431 | typedef struct acpi_lpit { |
| 432 | acpi_header_t header; |
| 433 | } __packed acpi_lpit_t; |
| 434 | |
| 435 | /* LPIT: LPI descriptor flags */ |
| 436 | typedef struct acpi_lpi_flags { |
| 437 | uint32_t disabled : 1; |
| 438 | uint32_t counter_not_available : 1; |
| 439 | uint32_t reserved : 30; |
| 440 | } __packed acpi_lpi_desc_flags_t; |
| 441 | |
| 442 | /* LPIT: LPI descriptor types */ |
| 443 | enum acpi_lpi_desc_type { |
| 444 | ACPI_LPI_DESC_TYPE_NATIVE_CSTATE = 0x00, |
| 445 | /* type >= 1 reserved */ |
| 446 | }; |
| 447 | |
| 448 | /* LPIT: LPI descriptor header */ |
| 449 | typedef struct acpi_lpi_desc_hdr { |
| 450 | uint32_t type; |
| 451 | uint32_t length; |
| 452 | uint16_t uid; |
| 453 | uint16_t reserved; |
| 454 | } __packed acpi_lpi_desc_hdr_t; |
| 455 | |
Sukumar Ghorai | ed1c03a | 2023-09-28 23:44:30 -0700 | [diff] [blame] | 456 | #define ACPI_LPIT_CTR_FREQ_TSC 0 |
Sukumar Ghorai | bd9c562 | 2023-10-07 23:19:34 -0700 | [diff] [blame] | 457 | |
Michael Niewöhner | f0a44ae | 2021-01-01 21:04:09 +0100 | [diff] [blame] | 458 | |
| 459 | /* LPIT: Native C-state instruction based LPI structure */ |
| 460 | typedef struct acpi_lpi_desc_ncst { |
| 461 | acpi_lpi_desc_hdr_t header; |
| 462 | acpi_lpi_desc_flags_t flags; |
| 463 | acpi_addr_t entry_trigger; /* Entry trigger C-state */ |
| 464 | uint32_t min_residency; /* Minimum residency or "break-even" in microseconds */ |
| 465 | uint32_t max_latency; /* Worst case exit latency in microseconds */ |
| 466 | acpi_addr_t residency_counter; |
| 467 | uint64_t counter_frequency; /* Frequency in cycles per second - 0 means TSC freq */ |
| 468 | } __packed acpi_lpi_desc_ncst_t; |
| 469 | |
Matt DeVillier | 7c04d0e | 2023-09-03 12:51:58 -0500 | [diff] [blame] | 470 | #define VFCT_VBIOS_CHECKSUM_OFFSET 0x21 |
| 471 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 472 | /* VFCT image header */ |
| 473 | typedef struct acpi_vfct_image_hdr { |
| 474 | u32 PCIBus; |
| 475 | u32 PCIDevice; |
| 476 | u32 PCIFunction; |
| 477 | u16 VendorID; |
| 478 | u16 DeviceID; |
| 479 | u16 SSVID; |
| 480 | u16 SSID; |
| 481 | u32 Revision; |
| 482 | u32 ImageLength; |
Matt DeVillier | 7c04d0e | 2023-09-03 12:51:58 -0500 | [diff] [blame] | 483 | u8 VbiosContent[]; // dummy - copy VBIOS here |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 484 | } __packed acpi_vfct_image_hdr_t; |
| 485 | |
| 486 | /* VFCT (VBIOS Fetch Table) */ |
| 487 | typedef struct acpi_vfct { |
| 488 | acpi_header_t header; |
| 489 | u8 TableUUID[16]; |
| 490 | u32 VBIOSImageOffset; |
| 491 | u32 Lib1ImageOffset; |
| 492 | u32 Reserved[4]; |
| 493 | acpi_vfct_image_hdr_t image_hdr; |
| 494 | } __packed acpi_vfct_t; |
| 495 | |
| 496 | typedef struct acpi_ivrs_info { |
| 497 | } __packed acpi_ivrs_info_t; |
| 498 | |
| 499 | /* IVRS IVHD (I/O Virtualization Hardware Definition Block) Type 10h */ |
| 500 | typedef struct acpi_ivrs_ivhd { |
| 501 | uint8_t type; |
| 502 | uint8_t flags; |
| 503 | uint16_t length; |
| 504 | uint16_t device_id; |
| 505 | uint16_t capability_offset; |
| 506 | uint32_t iommu_base_low; |
| 507 | uint32_t iommu_base_high; |
| 508 | uint16_t pci_segment_group; |
| 509 | uint16_t iommu_info; |
| 510 | uint32_t iommu_feature_info; |
Elyes Haouas | a4aa169a | 2023-07-30 12:59:50 +0200 | [diff] [blame] | 511 | uint8_t entry[]; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 512 | } __packed acpi_ivrs_ivhd_t; |
| 513 | |
| 514 | /* IVRS (I/O Virtualization Reporting Structure) Type 10h */ |
| 515 | typedef struct acpi_ivrs { |
| 516 | acpi_header_t header; |
| 517 | uint32_t iv_info; |
| 518 | uint32_t reserved[2]; |
| 519 | struct acpi_ivrs_ivhd ivhd; |
| 520 | } __packed acpi_ivrs_t; |
| 521 | |
Jason Glenesk | 61624b2 | 2020-11-02 20:06:23 -0800 | [diff] [blame] | 522 | /* CRAT (Component Resource Affinity Table Structure) */ |
| 523 | struct acpi_crat_header { |
| 524 | acpi_header_t header; |
| 525 | uint32_t total_entries; |
| 526 | uint16_t num_nodes; |
| 527 | uint8_t reserved[6]; |
| 528 | } __packed; |
| 529 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 530 | /* IVHD Type 11h IOMMU Attributes */ |
| 531 | typedef struct ivhd11_iommu_attr { |
| 532 | uint32_t reserved1 : 13; |
| 533 | uint32_t perf_counters : 4; |
| 534 | uint32_t perf_counter_banks : 6; |
| 535 | uint32_t msi_num_ppr : 5; |
| 536 | uint32_t reserved2 : 4; |
| 537 | } __packed ivhd11_iommu_attr_t; |
| 538 | |
| 539 | /* IVRS IVHD (I/O Virtualization Hardware Definition Block) Type 11h */ |
| 540 | typedef struct acpi_ivrs_ivhd_11 { |
| 541 | uint8_t type; |
| 542 | uint8_t flags; |
| 543 | uint16_t length; |
| 544 | uint16_t device_id; |
| 545 | uint16_t capability_offset; |
| 546 | uint32_t iommu_base_low; |
| 547 | uint32_t iommu_base_high; |
| 548 | uint16_t pci_segment_group; |
| 549 | uint16_t iommu_info; |
| 550 | struct ivhd11_iommu_attr iommu_attributes; |
| 551 | uint32_t efr_reg_image_low; |
| 552 | uint32_t efr_reg_image_high; |
| 553 | uint32_t reserved[2]; |
Elyes Haouas | a4aa169a | 2023-07-30 12:59:50 +0200 | [diff] [blame] | 554 | uint8_t entry[]; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 555 | } __packed acpi_ivrs_ivhd11_t; |
| 556 | |
| 557 | enum dev_scope_type { |
| 558 | SCOPE_PCI_ENDPOINT = 1, |
| 559 | SCOPE_PCI_SUB = 2, |
| 560 | SCOPE_IOAPIC = 3, |
| 561 | SCOPE_MSI_HPET = 4, |
| 562 | SCOPE_ACPI_NAMESPACE_DEVICE = 5 |
| 563 | }; |
| 564 | |
| 565 | typedef struct dev_scope { |
| 566 | u8 type; |
| 567 | u8 length; |
| 568 | u8 reserved[2]; |
| 569 | u8 enumeration; |
| 570 | u8 start_bus; |
| 571 | struct { |
| 572 | u8 dev; |
| 573 | u8 fn; |
Elyes Haouas | a4aa169a | 2023-07-30 12:59:50 +0200 | [diff] [blame] | 574 | } __packed path[]; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 575 | } __packed dev_scope_t; |
| 576 | |
| 577 | enum dmar_type { |
| 578 | DMAR_DRHD = 0, |
| 579 | DMAR_RMRR = 1, |
| 580 | DMAR_ATSR = 2, |
| 581 | DMAR_RHSA = 3, |
John Zhao | 6edbb18 | 2021-03-24 11:55:09 -0700 | [diff] [blame] | 582 | DMAR_ANDD = 4, |
| 583 | DMAR_SATC = 5 |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 584 | }; |
| 585 | |
| 586 | enum { |
| 587 | DRHD_INCLUDE_PCI_ALL = 1 |
| 588 | }; |
| 589 | |
John Zhao | 091532d | 2021-04-17 16:03:21 -0700 | [diff] [blame] | 590 | enum { |
| 591 | ATC_REQUIRED = 1 |
| 592 | }; |
| 593 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 594 | enum dmar_flags { |
| 595 | DMAR_INTR_REMAP = 1 << 0, |
| 596 | DMAR_X2APIC_OPT_OUT = 1 << 1, |
| 597 | DMA_CTRL_PLATFORM_OPT_IN_FLAG = 1 << 2, |
| 598 | }; |
| 599 | |
| 600 | typedef struct dmar_entry { |
| 601 | u16 type; |
| 602 | u16 length; |
| 603 | u8 flags; |
| 604 | u8 reserved; |
| 605 | u16 segment; |
| 606 | u64 bar; |
| 607 | } __packed dmar_entry_t; |
| 608 | |
| 609 | typedef struct dmar_rmrr_entry { |
| 610 | u16 type; |
| 611 | u16 length; |
| 612 | u16 reserved; |
| 613 | u16 segment; |
| 614 | u64 bar; |
| 615 | u64 limit; |
| 616 | } __packed dmar_rmrr_entry_t; |
| 617 | |
| 618 | typedef struct dmar_atsr_entry { |
| 619 | u16 type; |
| 620 | u16 length; |
| 621 | u8 flags; |
| 622 | u8 reserved; |
| 623 | u16 segment; |
| 624 | } __packed dmar_atsr_entry_t; |
| 625 | |
| 626 | typedef struct dmar_rhsa_entry { |
| 627 | u16 type; |
| 628 | u16 length; |
| 629 | u32 reserved; |
| 630 | u64 base_address; |
| 631 | u32 proximity_domain; |
| 632 | } __packed dmar_rhsa_entry_t; |
| 633 | |
| 634 | typedef struct dmar_andd_entry { |
| 635 | u16 type; |
| 636 | u16 length; |
| 637 | u8 reserved[3]; |
| 638 | u8 device_number; |
| 639 | u8 device_name[]; |
| 640 | } __packed dmar_andd_entry_t; |
| 641 | |
John Zhao | 6edbb18 | 2021-03-24 11:55:09 -0700 | [diff] [blame] | 642 | typedef struct dmar_satc_entry { |
| 643 | u16 type; |
| 644 | u16 length; |
| 645 | u8 flags; |
| 646 | u8 reserved; |
| 647 | u16 segment_number; |
John Zhao | 6edbb18 | 2021-03-24 11:55:09 -0700 | [diff] [blame] | 648 | } __packed dmar_satc_entry_t; |
| 649 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 650 | /* DMAR (DMA Remapping Reporting Structure) */ |
| 651 | typedef struct acpi_dmar { |
| 652 | acpi_header_t header; |
| 653 | u8 host_address_width; |
| 654 | u8 flags; |
| 655 | u8 reserved[10]; |
Elyes Haouas | a4aa169a | 2023-07-30 12:59:50 +0200 | [diff] [blame] | 656 | dmar_entry_t structure[]; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 657 | } __packed acpi_dmar_t; |
| 658 | |
| 659 | /* MADT: APIC Structure Types */ |
| 660 | enum acpi_apic_types { |
| 661 | LOCAL_APIC, /* Processor local APIC */ |
| 662 | IO_APIC, /* I/O APIC */ |
| 663 | IRQ_SOURCE_OVERRIDE, /* Interrupt source override */ |
| 664 | NMI_TYPE, /* NMI source */ |
| 665 | LOCAL_APIC_NMI, /* Local APIC NMI */ |
| 666 | LAPIC_ADDRESS_OVERRIDE, /* Local APIC address override */ |
| 667 | IO_SAPIC, /* I/O SAPIC */ |
| 668 | LOCAL_SAPIC, /* Local SAPIC */ |
| 669 | PLATFORM_IRQ_SOURCES, /* Platform interrupt sources */ |
| 670 | LOCAL_X2APIC, /* Processor local x2APIC */ |
| 671 | LOCAL_X2APIC_NMI, /* Local x2APIC NMI */ |
| 672 | GICC, /* GIC CPU Interface */ |
| 673 | GICD, /* GIC Distributor */ |
| 674 | GIC_MSI_FRAME, /* GIC MSI Frame */ |
| 675 | GICR, /* GIC Redistributor */ |
| 676 | GIC_ITS, /* Interrupt Translation Service */ |
| 677 | /* 0x10-0x7f: Reserved */ |
| 678 | /* 0x80-0xff: Reserved for OEM use */ |
| 679 | }; |
| 680 | |
| 681 | /* MADT: Processor Local APIC Structure */ |
| 682 | typedef struct acpi_madt_lapic { |
| 683 | u8 type; /* Type (0) */ |
| 684 | u8 length; /* Length in bytes (8) */ |
| 685 | u8 processor_id; /* ACPI processor ID */ |
| 686 | u8 apic_id; /* Local APIC ID */ |
| 687 | u32 flags; /* Local APIC flags */ |
| 688 | } __packed acpi_madt_lapic_t; |
| 689 | |
Kyösti Mälkki | 2e9f0d3 | 2023-04-07 23:05:46 +0300 | [diff] [blame] | 690 | #define ACPI_MADT_MAX_LAPIC_ID 0xfe |
| 691 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 692 | /* MADT: Local APIC NMI Structure */ |
| 693 | typedef struct acpi_madt_lapic_nmi { |
| 694 | u8 type; /* Type (4) */ |
| 695 | u8 length; /* Length in bytes (6) */ |
| 696 | u8 processor_id; /* ACPI processor ID */ |
| 697 | u16 flags; /* MPS INTI flags */ |
| 698 | u8 lint; /* Local APIC LINT# */ |
| 699 | } __packed acpi_madt_lapic_nmi_t; |
| 700 | |
Kyösti Mälkki | 66b5e1b | 2022-11-12 21:13:45 +0200 | [diff] [blame] | 701 | #define ACPI_MADT_LAPIC_NMI_ALL_PROCESSORS 0xff |
| 702 | #define ACPI_MADT_LX2APIC_NMI_ALL_PROCESSORS ((u32)-1) |
Raul E Rangel | f5552ce | 2021-02-11 11:27:56 -0700 | [diff] [blame] | 703 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 704 | /* MADT: I/O APIC Structure */ |
| 705 | typedef struct acpi_madt_ioapic { |
| 706 | u8 type; /* Type (1) */ |
| 707 | u8 length; /* Length in bytes (12) */ |
| 708 | u8 ioapic_id; /* I/O APIC ID */ |
| 709 | u8 reserved; |
| 710 | u32 ioapic_addr; /* I/O APIC address */ |
| 711 | u32 gsi_base; /* Global system interrupt base */ |
| 712 | } __packed acpi_madt_ioapic_t; |
| 713 | |
Raul E Rangel | 169302a | 2022-04-25 14:59:05 -0600 | [diff] [blame] | 714 | #define MP_IRQ_POLARITY_DEFAULT 0x0 |
| 715 | #define MP_IRQ_POLARITY_HIGH 0x1 |
| 716 | #define MP_IRQ_POLARITY_LOW 0x3 |
| 717 | #define MP_IRQ_POLARITY_MASK 0x3 |
| 718 | #define MP_IRQ_TRIGGER_DEFAULT 0x0 |
| 719 | #define MP_IRQ_TRIGGER_EDGE 0x4 |
| 720 | #define MP_IRQ_TRIGGER_LEVEL 0xc |
| 721 | #define MP_IRQ_TRIGGER_MASK 0xc |
| 722 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 723 | /* MADT: Interrupt Source Override Structure */ |
| 724 | typedef struct acpi_madt_irqoverride { |
| 725 | u8 type; /* Type (2) */ |
| 726 | u8 length; /* Length in bytes (10) */ |
| 727 | u8 bus; /* ISA (0) */ |
| 728 | u8 source; /* Bus-relative int. source (IRQ) */ |
| 729 | u32 gsirq; /* Global system interrupt */ |
| 730 | u16 flags; /* MPS INTI flags */ |
| 731 | } __packed acpi_madt_irqoverride_t; |
| 732 | |
| 733 | /* MADT: Processor Local x2APIC Structure */ |
| 734 | typedef struct acpi_madt_lx2apic { |
| 735 | u8 type; /* Type (9) */ |
| 736 | u8 length; /* Length in bytes (16) */ |
| 737 | u16 reserved; |
| 738 | u32 x2apic_id; /* Local x2APIC ID */ |
| 739 | u32 flags; /* Same as Local APIC flags */ |
| 740 | u32 processor_id; /* ACPI processor ID */ |
| 741 | } __packed acpi_madt_lx2apic_t; |
| 742 | |
| 743 | /* MADT: Processor Local x2APIC NMI Structure */ |
| 744 | typedef struct acpi_madt_lx2apic_nmi { |
| 745 | u8 type; /* Type (10) */ |
| 746 | u8 length; /* Length in bytes (12) */ |
| 747 | u16 flags; /* Same as MPS INTI flags */ |
| 748 | u32 processor_id; /* ACPI processor ID */ |
| 749 | u8 lint; /* Local APIC LINT# */ |
| 750 | u8 reserved[3]; |
| 751 | } __packed acpi_madt_lx2apic_nmi_t; |
| 752 | |
Arthur Heymans | 51d94c7 | 2023-06-27 15:37:37 +0200 | [diff] [blame] | 753 | /* MADT: GIC CPU Interface (GICC) Structure 6.5 */ |
| 754 | struct gicc_flags { |
| 755 | uint32_t enabled : 1; |
| 756 | /* 0 - Level-triggered | 1 - Edge-Triggered */ |
| 757 | uint32_t performance_interrupt_mode : 1; |
| 758 | uint32_t vgic_maintenance_interrupt_mode : 1; |
| 759 | uint32_t online_capable : 1; |
| 760 | uint32_t reserved : 28; |
| 761 | }; |
| 762 | _Static_assert(sizeof(struct gicc_flags) == sizeof(uint32_t), "Wrong gicc_flags size\n"); |
| 763 | |
| 764 | typedef struct acpi_gicc { |
| 765 | uint8_t type; |
| 766 | uint8_t length; |
| 767 | uint16_t reserved; |
| 768 | uint32_t cpu_interface_number; |
| 769 | uint32_t acpi_processor_uid; |
| 770 | struct gicc_flags flags; |
| 771 | uint32_t parking_protocol_version; |
| 772 | uint32_t performance_interrupt_gsiv; |
| 773 | uint64_t parked_address; |
| 774 | uint64_t physical_base_address; /* GIC v1/v2 or GIC v3/v4 in v2 compat mode */ |
| 775 | uint64_t gicv; |
| 776 | uint64_t gich; |
| 777 | uint32_t vgic_maintenance_interrupt; |
| 778 | uint64_t gicr_base_address; /* Only GIC v3 and above */ |
| 779 | uint64_t mpidr; |
| 780 | uint8_t processor_power_efficiency_class; |
| 781 | uint8_t reserved1; |
| 782 | uint16_t spe_overflow_interrupt; |
| 783 | uint16_t trbe_interrupt; |
| 784 | } __packed acpi_madt_gicc_t; |
| 785 | _Static_assert(sizeof(acpi_madt_gicc_t) == 82, "Wrong acpi_madt_gicc_t size\n"); |
| 786 | |
| 787 | /* MADT: GIC Distributor (GICD) Structure */ |
| 788 | typedef struct acpi_gicd { |
| 789 | uint8_t type; |
| 790 | uint8_t length; |
| 791 | uint16_t reserved1; |
| 792 | uint32_t gic_id; |
| 793 | uint64_t physical_base_address; |
| 794 | uint32_t system_vector_base; |
| 795 | uint8_t gic_version; |
| 796 | uint8_t reserved2[3]; |
| 797 | } __packed acpi_madt_gicd_t; |
| 798 | _Static_assert(sizeof(acpi_madt_gicd_t) == 24, "Wrong acpi_madt_gicd_t size\n"); |
| 799 | |
| 800 | /* MADT: GIC MSI Frame Structure */ |
| 801 | struct gic_msi_flags { |
| 802 | uint32_t spi_count_select : 1; |
| 803 | uint32_t reserved : 31; |
| 804 | }; |
| 805 | _Static_assert(sizeof(struct gic_msi_flags) == sizeof(uint32_t), "Wrong gic_msi_flags size\n"); |
| 806 | |
| 807 | typedef struct acpi_gic_msi { |
| 808 | uint8_t type; |
| 809 | uint8_t length; |
| 810 | uint16_t reserved; |
| 811 | uint32_t gic_msi_frame_id; |
| 812 | uint64_t physical_base_address; |
| 813 | struct gic_msi_flags flags; |
| 814 | uint16_t spi_count; |
| 815 | uint16_t spi_base; |
| 816 | } __packed acpi_gic_msi_t; |
| 817 | _Static_assert(sizeof(acpi_gic_msi_t) == 24, "Wrong acpi_gic_msi_t size\n"); |
| 818 | |
| 819 | /* MADT: GIC Redistributor (GICR) Structure */ |
| 820 | typedef struct acpi_girr { |
| 821 | uint8_t type; |
| 822 | uint8_t length; |
| 823 | uint16_t reserved; |
| 824 | uint64_t discovery_range_base_address; |
| 825 | uint32_t discovery_range_length; |
| 826 | } __packed acpi_madt_gicr_t; |
| 827 | _Static_assert(sizeof(acpi_madt_gicr_t) == 16, "Wrong acpi_madt_gicr_t size\n"); |
| 828 | |
| 829 | /* MADT: GIC Interrupt Translation Service (ITS) Structure */ |
| 830 | typedef struct acpi_gic_its { |
| 831 | uint8_t type; |
| 832 | uint8_t length; |
| 833 | uint16_t reserved; |
| 834 | uint32_t gic_its_id; |
| 835 | uint64_t physical_base_address; |
| 836 | uint32_t reserved2; |
| 837 | } __packed acpi_madt_gic_its_t; |
| 838 | _Static_assert(sizeof(acpi_madt_gic_its_t) == 20, "Wrong MADT acpi_madt_gic_its_t size\n"); |
| 839 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 840 | #define ACPI_DBG2_PORT_SERIAL 0x8000 |
| 841 | #define ACPI_DBG2_PORT_SERIAL_16550 0x0000 |
| 842 | #define ACPI_DBG2_PORT_SERIAL_16550_DBGP 0x0001 |
| 843 | #define ACPI_DBG2_PORT_SERIAL_ARM_PL011 0x0003 |
| 844 | #define ACPI_DBG2_PORT_SERIAL_ARM_SBSA 0x000e |
| 845 | #define ACPI_DBG2_PORT_SERIAL_ARM_DDC 0x000f |
| 846 | #define ACPI_DBG2_PORT_SERIAL_BCM2835 0x0010 |
| 847 | #define ACPI_DBG2_PORT_IEEE1394 0x8001 |
| 848 | #define ACPI_DBG2_PORT_IEEE1394_STANDARD 0x0000 |
| 849 | #define ACPI_DBG2_PORT_USB 0x8002 |
| 850 | #define ACPI_DBG2_PORT_USB_XHCI 0x0000 |
| 851 | #define ACPI_DBG2_PORT_USB_EHCI 0x0001 |
| 852 | #define ACPI_DBG2_PORT_NET 0x8003 |
| 853 | |
| 854 | /* DBG2: Microsoft Debug Port Table 2 header */ |
| 855 | typedef struct acpi_dbg2_header { |
| 856 | acpi_header_t header; |
| 857 | uint32_t devices_offset; |
| 858 | uint32_t devices_count; |
Elyes Haouas | 139cb06 | 2023-08-26 17:04:21 +0200 | [diff] [blame] | 859 | } __packed acpi_dbg2_header_t; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 860 | |
| 861 | /* DBG2: Microsoft Debug Port Table 2 device entry */ |
| 862 | typedef struct acpi_dbg2_device { |
| 863 | uint8_t revision; |
| 864 | uint16_t length; |
| 865 | uint8_t address_count; |
| 866 | uint16_t namespace_string_length; |
| 867 | uint16_t namespace_string_offset; |
| 868 | uint16_t oem_data_length; |
| 869 | uint16_t oem_data_offset; |
| 870 | uint16_t port_type; |
| 871 | uint16_t port_subtype; |
| 872 | uint8_t reserved[2]; |
| 873 | uint16_t base_address_offset; |
| 874 | uint16_t address_size_offset; |
Elyes Haouas | 139cb06 | 2023-08-26 17:04:21 +0200 | [diff] [blame] | 875 | } __packed acpi_dbg2_device_t; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 876 | |
| 877 | /* FADT (Fixed ACPI Description Table) */ |
| 878 | typedef struct acpi_fadt { |
| 879 | acpi_header_t header; |
| 880 | u32 firmware_ctrl; |
| 881 | u32 dsdt; |
| 882 | u8 reserved; /* Should be 0 */ |
| 883 | u8 preferred_pm_profile; |
| 884 | u16 sci_int; |
| 885 | u32 smi_cmd; |
| 886 | u8 acpi_enable; |
| 887 | u8 acpi_disable; |
| 888 | u8 s4bios_req; |
| 889 | u8 pstate_cnt; |
| 890 | u32 pm1a_evt_blk; |
| 891 | u32 pm1b_evt_blk; |
| 892 | u32 pm1a_cnt_blk; |
| 893 | u32 pm1b_cnt_blk; |
| 894 | u32 pm2_cnt_blk; |
| 895 | u32 pm_tmr_blk; |
| 896 | u32 gpe0_blk; |
| 897 | u32 gpe1_blk; |
| 898 | u8 pm1_evt_len; |
| 899 | u8 pm1_cnt_len; |
| 900 | u8 pm2_cnt_len; |
| 901 | u8 pm_tmr_len; |
| 902 | u8 gpe0_blk_len; |
| 903 | u8 gpe1_blk_len; |
| 904 | u8 gpe1_base; |
| 905 | u8 cst_cnt; |
| 906 | u16 p_lvl2_lat; |
| 907 | u16 p_lvl3_lat; |
| 908 | u16 flush_size; |
| 909 | u16 flush_stride; |
| 910 | u8 duty_offset; |
| 911 | u8 duty_width; |
| 912 | u8 day_alrm; |
| 913 | u8 mon_alrm; |
| 914 | u8 century; |
| 915 | u16 iapc_boot_arch; |
| 916 | u8 res2; |
| 917 | u32 flags; |
| 918 | acpi_addr_t reset_reg; |
| 919 | u8 reset_value; |
Elyes Haouas | b55ac09 | 2022-02-16 14:42:19 +0100 | [diff] [blame] | 920 | u16 ARM_boot_arch; /* Must be zero if ACPI Revision <= 5.0 */ |
Elyes Haouas | 8b950f4 | 2022-02-16 12:08:16 +0100 | [diff] [blame] | 921 | u8 FADT_MinorVersion; /* Must be zero if ACPI Revision <= 5.0 */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 922 | u32 x_firmware_ctl_l; |
| 923 | u32 x_firmware_ctl_h; |
| 924 | u32 x_dsdt_l; |
| 925 | u32 x_dsdt_h; |
| 926 | acpi_addr_t x_pm1a_evt_blk; |
| 927 | acpi_addr_t x_pm1b_evt_blk; |
| 928 | acpi_addr_t x_pm1a_cnt_blk; |
| 929 | acpi_addr_t x_pm1b_cnt_blk; |
| 930 | acpi_addr_t x_pm2_cnt_blk; |
| 931 | acpi_addr_t x_pm_tmr_blk; |
| 932 | acpi_addr_t x_gpe0_blk; |
| 933 | acpi_addr_t x_gpe1_blk; |
| 934 | /* Revision 5 */ |
| 935 | acpi_addr_t sleep_control_reg; |
| 936 | acpi_addr_t sleep_status_reg; |
| 937 | /* Revision 6 */ |
| 938 | u64 hypervisor_vendor_identity; |
| 939 | } __packed acpi_fadt_t; |
| 940 | |
| 941 | /* FADT TABLE Revision values */ |
Elyes Haouas | 8b950f4 | 2022-02-16 12:08:16 +0100 | [diff] [blame] | 942 | #define ACPI_FADT_REV_ACPI_1 1 |
| 943 | #define ACPI_FADT_REV_ACPI_2 3 |
| 944 | #define ACPI_FADT_REV_ACPI_3 4 |
| 945 | #define ACPI_FADT_REV_ACPI_4 4 |
| 946 | #define ACPI_FADT_REV_ACPI_5 5 |
| 947 | #define ACPI_FADT_REV_ACPI_6 6 |
| 948 | |
| 949 | /* FADT Minor Version value: |
| 950 | * Bits 0-3: minor version |
| 951 | * Bits 4-7: Errata |
| 952 | * value of 1 means this is compatible with Errata A, |
| 953 | * value of 2 would be compatible with Errata B, and so on |
| 954 | * Version 6.3 Errata A would be: (1 << 4) | 3 |
| 955 | */ |
| 956 | #define ACPI_FADT_MINOR_VERSION_0 0 /* coreboot currently use this version */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 957 | |
| 958 | /* Flags for p_lvl2_lat and p_lvl3_lat */ |
| 959 | #define ACPI_FADT_C2_NOT_SUPPORTED 101 |
| 960 | #define ACPI_FADT_C3_NOT_SUPPORTED 1001 |
| 961 | |
| 962 | /* FADT Feature Flags */ |
| 963 | #define ACPI_FADT_WBINVD (1 << 0) |
| 964 | #define ACPI_FADT_WBINVD_FLUSH (1 << 1) |
| 965 | #define ACPI_FADT_C1_SUPPORTED (1 << 2) |
| 966 | #define ACPI_FADT_C2_MP_SUPPORTED (1 << 3) |
| 967 | #define ACPI_FADT_POWER_BUTTON (1 << 4) |
| 968 | #define ACPI_FADT_SLEEP_BUTTON (1 << 5) |
| 969 | #define ACPI_FADT_FIXED_RTC (1 << 6) |
| 970 | #define ACPI_FADT_S4_RTC_WAKE (1 << 7) |
| 971 | #define ACPI_FADT_32BIT_TIMER (1 << 8) |
| 972 | #define ACPI_FADT_DOCKING_SUPPORTED (1 << 9) |
| 973 | #define ACPI_FADT_RESET_REGISTER (1 << 10) |
| 974 | #define ACPI_FADT_SEALED_CASE (1 << 11) |
| 975 | #define ACPI_FADT_HEADLESS (1 << 12) |
| 976 | #define ACPI_FADT_SLEEP_TYPE (1 << 13) |
| 977 | #define ACPI_FADT_PCI_EXPRESS_WAKE (1 << 14) |
| 978 | #define ACPI_FADT_PLATFORM_CLOCK (1 << 15) |
| 979 | #define ACPI_FADT_S4_RTC_VALID (1 << 16) |
| 980 | #define ACPI_FADT_REMOTE_POWER_ON (1 << 17) |
| 981 | #define ACPI_FADT_APIC_CLUSTER (1 << 18) |
| 982 | #define ACPI_FADT_APIC_PHYSICAL (1 << 19) |
| 983 | /* Bits 20-31: reserved ACPI 3.0 & 4.0 */ |
| 984 | #define ACPI_FADT_HW_REDUCED_ACPI (1 << 20) |
| 985 | #define ACPI_FADT_LOW_PWR_IDLE_S0 (1 << 21) |
| 986 | /* bits 22-31: reserved since ACPI 5.0 */ |
| 987 | |
| 988 | /* FADT Boot Architecture Flags */ |
| 989 | #define ACPI_FADT_LEGACY_DEVICES (1 << 0) |
| 990 | #define ACPI_FADT_8042 (1 << 1) |
| 991 | #define ACPI_FADT_VGA_NOT_PRESENT (1 << 2) |
| 992 | #define ACPI_FADT_MSI_NOT_SUPPORTED (1 << 3) |
| 993 | #define ACPI_FADT_NO_PCIE_ASPM_CONTROL (1 << 4) |
| 994 | #define ACPI_FADT_NO_CMOS_RTC (1 << 5) |
| 995 | #define ACPI_FADT_LEGACY_FREE 0x00 /* No legacy devices (including 8042) */ |
| 996 | |
| 997 | /* FADT ARM Boot Architecture Flags */ |
| 998 | #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0) |
| 999 | #define ACPI_FADT_ARM_PSCI_USE_HVC (1 << 1) |
| 1000 | /* bits 2-16: reserved since ACPI 5.1 */ |
| 1001 | |
| 1002 | /* FADT Preferred Power Management Profile */ |
| 1003 | enum acpi_preferred_pm_profiles { |
| 1004 | PM_UNSPECIFIED = 0, |
| 1005 | PM_DESKTOP = 1, |
| 1006 | PM_MOBILE = 2, |
| 1007 | PM_WORKSTATION = 3, |
| 1008 | PM_ENTERPRISE_SERVER = 4, |
| 1009 | PM_SOHO_SERVER = 5, |
| 1010 | PM_APPLIANCE_PC = 6, |
| 1011 | PM_PERFORMANCE_SERVER = 7, |
| 1012 | PM_TABLET = 8, /* ACPI 5.0 & greater */ |
| 1013 | }; |
| 1014 | |
| 1015 | /* FACS (Firmware ACPI Control Structure) */ |
| 1016 | typedef struct acpi_facs { |
| 1017 | char signature[4]; /* "FACS" */ |
| 1018 | u32 length; /* Length in bytes (>= 64) */ |
| 1019 | u32 hardware_signature; /* Hardware signature */ |
| 1020 | u32 firmware_waking_vector; /* Firmware waking vector */ |
| 1021 | u32 global_lock; /* Global lock */ |
| 1022 | u32 flags; /* FACS flags */ |
| 1023 | u32 x_firmware_waking_vector_l; /* X FW waking vector, low */ |
| 1024 | u32 x_firmware_waking_vector_h; /* X FW waking vector, high */ |
| 1025 | u8 version; /* FACS version */ |
| 1026 | u8 resv1[3]; /* This value is 0 */ |
| 1027 | u32 ospm_flags; /* 64BIT_WAKE_F */ |
| 1028 | u8 resv2[24]; /* This value is 0 */ |
| 1029 | } __packed acpi_facs_t; |
| 1030 | |
| 1031 | /* FACS flags */ |
| 1032 | #define ACPI_FACS_S4BIOS_F (1 << 0) |
| 1033 | #define ACPI_FACS_64BIT_WAKE_F (1 << 1) |
| 1034 | /* Bits 31..2: reserved */ |
| 1035 | |
| 1036 | /* ECDT (Embedded Controller Boot Resources Table) */ |
| 1037 | typedef struct acpi_ecdt { |
| 1038 | acpi_header_t header; |
| 1039 | acpi_addr_t ec_control; /* EC control register */ |
| 1040 | acpi_addr_t ec_data; /* EC data register */ |
| 1041 | u32 uid; /* UID */ |
| 1042 | u8 gpe_bit; /* GPE bit */ |
| 1043 | u8 ec_id[]; /* EC ID */ |
| 1044 | } __packed acpi_ecdt_t; |
| 1045 | |
| 1046 | /* HEST (Hardware Error Source Table) */ |
| 1047 | typedef struct acpi_hest { |
| 1048 | acpi_header_t header; |
| 1049 | u32 error_source_count; |
| 1050 | /* error_source_struct(s) */ |
| 1051 | } __packed acpi_hest_t; |
| 1052 | |
| 1053 | /* Error Source Descriptors */ |
| 1054 | typedef struct acpi_hest_esd { |
| 1055 | u16 type; |
| 1056 | u16 source_id; |
| 1057 | u16 resv; |
| 1058 | u8 flags; |
| 1059 | u8 enabled; |
| 1060 | u32 prealloc_erecords; /* The number of error records to |
| 1061 | * pre-allocate for this error source. |
| 1062 | */ |
| 1063 | u32 max_section_per_record; |
| 1064 | } __packed acpi_hest_esd_t; |
| 1065 | |
| 1066 | /* Hardware Error Notification */ |
| 1067 | typedef struct acpi_hest_hen { |
| 1068 | u8 type; |
| 1069 | u8 length; |
| 1070 | u16 conf_we; /* Configuration Write Enable */ |
| 1071 | u32 poll_interval; |
| 1072 | u32 vector; |
| 1073 | u32 sw2poll_threshold_val; |
| 1074 | u32 sw2poll_threshold_win; |
| 1075 | u32 error_threshold_val; |
| 1076 | u32 error_threshold_win; |
| 1077 | } __packed acpi_hest_hen_t; |
| 1078 | |
| 1079 | /* BERT (Boot Error Record Table) */ |
| 1080 | typedef struct acpi_bert { |
| 1081 | acpi_header_t header; |
| 1082 | u32 region_length; |
| 1083 | u64 error_region; |
| 1084 | } __packed acpi_bert_t; |
| 1085 | |
| 1086 | /* Generic Error Data Entry */ |
| 1087 | typedef struct acpi_hest_generic_data { |
| 1088 | guid_t section_type; |
| 1089 | u32 error_severity; |
| 1090 | u16 revision; |
| 1091 | u8 validation_bits; |
| 1092 | u8 flags; |
| 1093 | u32 data_length; |
| 1094 | guid_t fru_id; |
| 1095 | u8 fru_text[20]; |
| 1096 | /* error data */ |
| 1097 | } __packed acpi_hest_generic_data_t; |
| 1098 | |
| 1099 | /* Generic Error Data Entry v300 */ |
| 1100 | typedef struct acpi_hest_generic_data_v300 { |
| 1101 | guid_t section_type; |
| 1102 | u32 error_severity; |
| 1103 | u16 revision; |
| 1104 | u8 validation_bits; |
| 1105 | u8 flags; /* see CPER Section Descriptor, Flags field */ |
| 1106 | u32 data_length; |
| 1107 | guid_t fru_id; |
| 1108 | u8 fru_text[20]; |
| 1109 | cper_timestamp_t timestamp; |
| 1110 | /* error data */ |
| 1111 | } __packed acpi_hest_generic_data_v300_t; |
| 1112 | #define HEST_GENERIC_ENTRY_V300 0x300 |
| 1113 | |
| 1114 | /* Both Generic Error Status & Generic Error Data Entry, Error Severity field */ |
| 1115 | #define ACPI_GENERROR_SEV_RECOVERABLE 0 |
| 1116 | #define ACPI_GENERROR_SEV_FATAL 1 |
| 1117 | #define ACPI_GENERROR_SEV_CORRECTED 2 |
| 1118 | #define ACPI_GENERROR_SEV_NONE 3 |
| 1119 | |
| 1120 | /* Generic Error Data Entry, Validation Bits field */ |
| 1121 | #define ACPI_GENERROR_VALID_FRUID BIT(0) |
| 1122 | #define ACPI_GENERROR_VALID_FRUID_TEXT BIT(1) |
| 1123 | #define ACPI_GENERROR_VALID_TIMESTAMP BIT(2) |
| 1124 | |
Felix Held | 403fa86 | 2021-07-26 22:43:00 +0200 | [diff] [blame] | 1125 | /* |
| 1126 | * Generic Error Status Block |
| 1127 | * |
| 1128 | * If there is a raw data section at the end of the generic error status block after the |
| 1129 | * zero or more generic error data entries, raw_data_length indicates the length of the raw |
| 1130 | * section and raw_data_offset is the offset of the beginning of the raw data section from |
| 1131 | * the start of the acpi_generic_error_status block it is contained in. So if raw_data_length |
| 1132 | * is non-zero, raw_data_offset must be at least sizeof(acpi_generic_error_status_t). |
| 1133 | */ |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1134 | typedef struct acpi_generic_error_status { |
| 1135 | u32 block_status; |
| 1136 | u32 raw_data_offset; /* must follow any generic entries */ |
| 1137 | u32 raw_data_length; |
| 1138 | u32 data_length; /* generic data */ |
| 1139 | u32 error_severity; |
| 1140 | /* Generic Error Data structures, zero or more entries */ |
| 1141 | } __packed acpi_generic_error_status_t; |
| 1142 | |
| 1143 | /* Generic Status Block, Block Status values */ |
| 1144 | #define GENERIC_ERR_STS_UNCORRECTABLE_VALID BIT(0) |
| 1145 | #define GENERIC_ERR_STS_CORRECTABLE_VALID BIT(1) |
| 1146 | #define GENERIC_ERR_STS_MULT_UNCORRECTABLE BIT(2) |
| 1147 | #define GENERIC_ERR_STS_MULT_CORRECTABLE BIT(3) |
| 1148 | #define GENERIC_ERR_STS_ENTRY_COUNT_SHIFT 4 |
| 1149 | #define GENERIC_ERR_STS_ENTRY_COUNT_MAX 0x3ff |
| 1150 | #define GENERIC_ERR_STS_ENTRY_COUNT_MASK \ |
| 1151 | (GENERIC_ERR_STS_ENTRY_COUNT_MAX \ |
| 1152 | << GENERIC_ERR_STS_ENTRY_COUNT_SHIFT) |
| 1153 | |
| 1154 | typedef struct acpi_cstate { |
| 1155 | u8 ctype; |
| 1156 | u16 latency; |
| 1157 | u32 power; |
| 1158 | acpi_addr_t resource; |
| 1159 | } __packed acpi_cstate_t; |
| 1160 | |
Jason Glenesk | ca36aed | 2020-09-15 21:01:57 -0700 | [diff] [blame] | 1161 | struct acpi_sw_pstate { |
| 1162 | u32 core_freq; |
| 1163 | u32 power; |
| 1164 | u32 transition_latency; |
| 1165 | u32 bus_master_latency; |
| 1166 | u32 control_value; |
| 1167 | u32 status_value; |
| 1168 | } __packed; |
| 1169 | |
| 1170 | struct acpi_xpss_sw_pstate { |
| 1171 | u64 core_freq; |
| 1172 | u64 power; |
| 1173 | u64 transition_latency; |
| 1174 | u64 bus_master_latency; |
| 1175 | u64 control_value; |
| 1176 | u64 status_value; |
| 1177 | u64 control_mask; |
| 1178 | u64 status_mask; |
| 1179 | } __packed; |
| 1180 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1181 | typedef struct acpi_tstate { |
| 1182 | u32 percent; |
| 1183 | u32 power; |
| 1184 | u32 latency; |
| 1185 | u32 control; |
| 1186 | u32 status; |
| 1187 | } __packed acpi_tstate_t; |
| 1188 | |
Raul E Rangel | c704832 | 2021-04-19 15:58:25 -0600 | [diff] [blame] | 1189 | enum acpi_lpi_state_flags { |
| 1190 | ACPI_LPI_STATE_DISABLED = 0, |
| 1191 | ACPI_LPI_STATE_ENABLED |
| 1192 | }; |
| 1193 | |
| 1194 | /* Low Power Idle State */ |
| 1195 | struct acpi_lpi_state { |
| 1196 | u32 min_residency_us; |
| 1197 | u32 worst_case_wakeup_latency_us; |
| 1198 | u32 flags; |
| 1199 | u32 arch_context_lost_flags; |
| 1200 | u32 residency_counter_frequency_hz; |
| 1201 | u32 enabled_parent_state; |
| 1202 | acpi_addr_t entry_method; |
| 1203 | acpi_addr_t residency_counter_register; |
| 1204 | acpi_addr_t usage_counter_register; |
| 1205 | const char *state_name; |
| 1206 | }; |
| 1207 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1208 | /* Port types for ACPI _UPC object */ |
| 1209 | enum acpi_upc_type { |
| 1210 | UPC_TYPE_A, |
| 1211 | UPC_TYPE_MINI_AB, |
| 1212 | UPC_TYPE_EXPRESSCARD, |
| 1213 | UPC_TYPE_USB3_A, |
| 1214 | UPC_TYPE_USB3_B, |
| 1215 | UPC_TYPE_USB3_MICRO_B, |
| 1216 | UPC_TYPE_USB3_MICRO_AB, |
| 1217 | UPC_TYPE_USB3_POWER_B, |
| 1218 | UPC_TYPE_C_USB2_ONLY, |
| 1219 | UPC_TYPE_C_USB2_SS_SWITCH, |
| 1220 | UPC_TYPE_C_USB2_SS, |
| 1221 | UPC_TYPE_PROPRIETARY = 0xff, |
| 1222 | /* |
| 1223 | * The following types are not directly defined in the ACPI |
| 1224 | * spec but are used by coreboot to identify a USB device type. |
| 1225 | */ |
| 1226 | UPC_TYPE_INTERNAL = 0xff, |
| 1227 | UPC_TYPE_UNUSED, |
| 1228 | UPC_TYPE_HUB |
| 1229 | }; |
| 1230 | |
| 1231 | enum acpi_ipmi_interface_type { |
| 1232 | IPMI_INTERFACE_RESERVED = 0, |
| 1233 | IPMI_INTERFACE_KCS, |
| 1234 | IPMI_INTERFACE_SMIC, |
| 1235 | IPMI_INTERFACE_BT, |
| 1236 | IPMI_INTERFACE_SSIF, |
| 1237 | }; |
| 1238 | |
| 1239 | #define ACPI_IPMI_PCI_DEVICE_FLAG (1 << 0) |
| 1240 | #define ACPI_IPMI_INT_TYPE_SCI (1 << 0) |
| 1241 | #define ACPI_IPMI_INT_TYPE_APIC (1 << 1) |
| 1242 | |
| 1243 | /* ACPI IPMI 2.0 */ |
| 1244 | struct acpi_spmi { |
| 1245 | acpi_header_t header; |
| 1246 | u8 interface_type; |
| 1247 | u8 reserved; |
| 1248 | u16 specification_revision; |
| 1249 | u8 interrupt_type; |
| 1250 | u8 gpe; |
| 1251 | u8 reserved2; |
| 1252 | u8 pci_device_flag; |
| 1253 | |
| 1254 | u32 global_system_interrupt; |
| 1255 | acpi_addr_t base_address; |
| 1256 | union { |
| 1257 | struct { |
| 1258 | u8 pci_segment_group; |
| 1259 | u8 pci_bus; |
| 1260 | u8 pci_device; |
| 1261 | u8 pci_function; |
| 1262 | }; |
| 1263 | u8 uid[4]; |
| 1264 | }; |
| 1265 | u8 reserved3; |
| 1266 | } __packed; |
| 1267 | |
Rocky Phagura | eff0713 | 2021-01-10 15:42:50 -0800 | [diff] [blame] | 1268 | /* EINJ APEI Standard Definitions */ |
| 1269 | /* EINJ Error Types |
| 1270 | Refer to the ACPI spec, EINJ section, for more info on bit definitions |
| 1271 | */ |
| 1272 | #define ACPI_EINJ_CPU_CE (1 << 0) |
| 1273 | #define ACPI_EINJ_CPU_UCE (1 << 1) |
| 1274 | #define ACPI_EINJ_CPU_UCE_FATAL (1 << 2) |
| 1275 | #define ACPI_EINJ_MEM_CE (1 << 3) |
| 1276 | #define ACPI_EINJ_MEM_UCE (1 << 4) |
| 1277 | #define ACPI_EINJ_MEM_UCE_FATAL (1 << 5) |
| 1278 | #define ACPI_EINJ_PCIE_CE (1 << 6) |
| 1279 | #define ACPI_EINJ_PCIE_UCE_NON_FATAL (1 << 7) |
| 1280 | #define ACPI_EINJ_PCIE_UCE_FATAL (1 << 8) |
| 1281 | #define ACPI_EINJ_PLATFORM_CE (1 << 9) |
| 1282 | #define ACPI_EINJ_PLATFORM_UCE (1 << 10) |
| 1283 | #define ACPI_EINJ_PLATFORM_UCE_FATAL (1 << 11) |
| 1284 | #define ACPI_EINJ_VENDOR_DEFINED (1 << 31) |
| 1285 | #define ACPI_EINJ_DEFAULT_CAP (ACPI_EINJ_MEM_CE | ACPI_EINJ_MEM_UCE | \ |
| 1286 | ACPI_EINJ_PCIE_CE | ACPI_EINJ_PCIE_UCE_FATAL) |
| 1287 | |
| 1288 | /* EINJ actions */ |
| 1289 | #define ACTION_COUNT 9 |
| 1290 | #define BEGIN_INJECT_OP 0x00 |
| 1291 | #define GET_TRIGGER_ACTION_TABLE 0x01 |
| 1292 | #define SET_ERROR_TYPE 0x02 |
| 1293 | #define GET_ERROR_TYPE 0x03 |
| 1294 | #define END_INJECT_OP 0x04 |
| 1295 | #define EXECUTE_INJECT_OP 0x05 |
| 1296 | #define CHECK_BUSY_STATUS 0x06 |
| 1297 | #define GET_CMD_STATUS 0x07 |
| 1298 | #define SET_ERROR_TYPE_WITH_ADDRESS 0x08 |
| 1299 | #define TRIGGER_ERROR 0xFF |
| 1300 | |
| 1301 | /* EINJ Instructions */ |
| 1302 | #define READ_REGISTER 0x00 |
| 1303 | #define READ_REGISTER_VALUE 0x01 |
| 1304 | #define WRITE_REGISTER 0x02 |
| 1305 | #define WRITE_REGISTER_VALUE 0x03 |
| 1306 | #define NO_OP 0x04 |
| 1307 | |
| 1308 | /* EINJ (Error Injection Table) */ |
| 1309 | typedef struct acpi_gen_regaddr1 { |
| 1310 | u8 space_id; /* Address space ID */ |
| 1311 | u8 bit_width; /* Register size in bits */ |
| 1312 | u8 bit_offset; /* Register bit offset */ |
| 1313 | u8 access_size; /* Access size since ACPI 2.0c */ |
| 1314 | u64 addr; /* Register address */ |
| 1315 | } __packed acpi_addr64_t; |
| 1316 | |
| 1317 | /* Instruction entry */ |
| 1318 | typedef struct acpi_einj_action_table { |
| 1319 | u8 action; |
| 1320 | u8 instruction; |
| 1321 | u16 flags; |
| 1322 | acpi_addr64_t reg; |
| 1323 | u64 value; |
| 1324 | u64 mask; |
| 1325 | } __packed acpi_einj_action_table_t; |
| 1326 | |
| 1327 | typedef struct acpi_injection_header { |
| 1328 | u32 einj_header_size; |
| 1329 | u32 flags; |
| 1330 | u32 entry_count; |
| 1331 | } __packed acpi_injection_header_t; |
| 1332 | |
| 1333 | typedef struct acpi_einj_trigger_table { |
| 1334 | u32 header_size; |
| 1335 | u32 revision; |
| 1336 | u32 table_size; |
| 1337 | u32 entry_count; |
Elyes Haouas | a4aa169a | 2023-07-30 12:59:50 +0200 | [diff] [blame] | 1338 | acpi_einj_action_table_t trigger_action[]; |
Rocky Phagura | eff0713 | 2021-01-10 15:42:50 -0800 | [diff] [blame] | 1339 | } __packed acpi_einj_trigger_table_t; |
| 1340 | |
| 1341 | typedef struct set_error_type { |
| 1342 | u32 errtype; |
| 1343 | u32 vendorerrortype; |
| 1344 | u32 flags; |
| 1345 | u32 apicid; |
| 1346 | u64 memaddr; |
| 1347 | u64 memrange; |
| 1348 | u32 pciesbdf; |
| 1349 | } __packed set_error_type_t; |
| 1350 | |
| 1351 | #define EINJ_PARAM_NUM 6 |
| 1352 | typedef struct acpi_einj_smi { |
| 1353 | u64 op_state; |
| 1354 | u64 err_inject[EINJ_PARAM_NUM]; |
| 1355 | u64 trigger_action_table; |
| 1356 | u64 err_inj_cap; |
| 1357 | u64 op_status; |
| 1358 | u64 cmd_sts; |
| 1359 | u64 einj_addr; |
| 1360 | u64 einj_addr_msk; |
| 1361 | set_error_type_t setaddrtable; |
| 1362 | u64 reserved[50]; |
| 1363 | } __packed acpi_einj_smi_t; |
| 1364 | |
| 1365 | /* EINJ Flags */ |
| 1366 | #define EINJ_DEF_TRIGGER_PORT 0xb2 |
| 1367 | #define FLAG_PRESERVE 0x01 |
| 1368 | #define FLAG_IGNORE 0x00 |
| 1369 | |
| 1370 | /* EINJ Registers */ |
| 1371 | #define EINJ_REG_MEMORY(address) \ |
| 1372 | { \ |
| 1373 | .space_id = ACPI_ADDRESS_SPACE_MEMORY, \ |
| 1374 | .bit_width = 64, \ |
| 1375 | .bit_offset = 0, \ |
| 1376 | .access_size = ACPI_ACCESS_SIZE_QWORD_ACCESS, \ |
| 1377 | .addr = address} |
| 1378 | |
| 1379 | #define EINJ_REG_IO() \ |
| 1380 | { \ |
| 1381 | .space_id = ACPI_ADDRESS_SPACE_IO, \ |
| 1382 | .bit_width = 0x10, \ |
| 1383 | .bit_offset = 0, \ |
| 1384 | .access_size = ACPI_ACCESS_SIZE_WORD_ACCESS, \ |
| 1385 | .addr = EINJ_DEF_TRIGGER_PORT} /* HW dependent code can override this also */ |
| 1386 | |
| 1387 | typedef struct acpi_einj { |
| 1388 | acpi_header_t header; |
| 1389 | acpi_injection_header_t inj_header; |
| 1390 | acpi_einj_action_table_t action_table[ACTION_COUNT]; |
| 1391 | } __packed acpi_einj_t; |
| 1392 | |
Arthur Heymans | e7aaf04 | 2023-06-07 12:12:45 +0200 | [diff] [blame] | 1393 | /* SPCR (Serial Port Console Redirection Table) */ |
| 1394 | typedef struct acpi_spcr { |
| 1395 | acpi_header_t header; |
| 1396 | uint8_t interface_type; |
| 1397 | uint8_t reserved[3]; |
| 1398 | acpi_addr_t base_address; |
| 1399 | uint8_t interrupt_type; |
| 1400 | uint8_t irq; |
| 1401 | uint32_t global_system_interrupt; |
| 1402 | uint8_t configured_baudrate; |
| 1403 | uint8_t parity; |
| 1404 | uint8_t stop_bits; |
| 1405 | uint8_t flow_control; |
| 1406 | uint8_t terminal_type; |
| 1407 | uint8_t language; |
| 1408 | uint16_t pci_did; |
| 1409 | uint16_t pci_vid; |
| 1410 | uint8_t pci_bus; |
| 1411 | uint8_t pci_dev; |
| 1412 | uint8_t pci_fun; |
| 1413 | uint32_t pci_flags; |
| 1414 | uint8_t pci_segment; |
| 1415 | uint32_t uart_clock; |
| 1416 | uint32_t precise_baud_rate; |
| 1417 | uint16_t namespace_string_length; |
| 1418 | uint16_t namespace_string_offset; |
| 1419 | char namespacestring[]; |
| 1420 | } __packed acpi_spcr_t; |
| 1421 | _Static_assert(sizeof(acpi_spcr_t) == 88, "acpi_spcr_t must have an 88 byte size\n"); |
| 1422 | |
Arthur Heymans | 9046407 | 2023-06-07 12:53:50 +0200 | [diff] [blame] | 1423 | #define PC_AT_COMPATIBLE_INTERRUPT (1 << 0) |
| 1424 | #define IO_APIC_COMPATIBLE_INTERRUPT (1 << 1) |
| 1425 | #define IO_SAPIC_COMPATIBLE_INTERRUPT (1 << 2) |
| 1426 | #define ARMH_GIC_COMPATIBLE_INTERRUPT (1 << 3) |
| 1427 | #define RISCV_PLIC_COMPATIBLE_INTERRUPT (1 << 4) |
| 1428 | |
Arthur Heymans | 8193eab | 2023-06-20 10:17:23 +0200 | [diff] [blame] | 1429 | /* GTDT - Generic Timer Description Table (ACPI 5.1) Version 2 */ |
| 1430 | typedef struct acpi_table_gtdt { |
| 1431 | acpi_header_t header; /* Common ACPI table header */ |
Naresh Solanki | 75f0b60 | 2023-09-25 13:59:25 +0200 | [diff] [blame] | 1432 | u64 counter_block_address; |
Arthur Heymans | 8193eab | 2023-06-20 10:17:23 +0200 | [diff] [blame] | 1433 | u32 reserved; |
| 1434 | u32 secure_el1_interrupt; |
| 1435 | u32 secure_el1_flags; |
| 1436 | u32 non_secure_el1_interrupt; |
| 1437 | u32 non_secure_el1_flags; |
| 1438 | u32 virtual_timer_interrupt; |
| 1439 | u32 virtual_timer_flags; |
| 1440 | u32 non_secure_el2_interrupt; |
| 1441 | u32 non_secure_el2_flags; |
| 1442 | u64 counter_read_block_address; |
| 1443 | u32 platform_timer_count; |
| 1444 | u32 platform_timer_offset; |
| 1445 | } __packed acpi_gtdt_t; |
| 1446 | |
| 1447 | /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ |
| 1448 | |
| 1449 | #define ACPI_GTDT_INTERRUPT_MODE (1) |
| 1450 | #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) |
| 1451 | #define ACPI_GTDT_ALWAYS_ON (1<<2) |
| 1452 | |
| 1453 | struct acpi_gtdt_el2 { |
| 1454 | u32 virtual_el2_timer_gsiv; |
| 1455 | u32 virtual_el2_timer_flags; |
| 1456 | }; |
| 1457 | |
| 1458 | /* Common GTDT subtable header */ |
| 1459 | |
| 1460 | struct acpi_gtdt_header { |
| 1461 | u8 type; |
| 1462 | u16 length; |
| 1463 | } __packed; |
| 1464 | |
| 1465 | /* Values for GTDT subtable type above */ |
| 1466 | |
| 1467 | enum acpi_gtdt_type { |
| 1468 | ACPI_GTDT_TYPE_TIMER_BLOCK = 0, |
| 1469 | ACPI_GTDT_TYPE_WATCHDOG = 1, |
| 1470 | ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ |
| 1471 | }; |
| 1472 | |
| 1473 | /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */ |
| 1474 | |
| 1475 | /* 0: Generic Timer Block */ |
| 1476 | |
| 1477 | struct acpi_gtdt_timer_block { |
| 1478 | struct acpi_gtdt_header header; |
| 1479 | u8 reserved; |
| 1480 | u64 block_address; |
| 1481 | u32 timer_count; |
| 1482 | u32 timer_offset; |
| 1483 | } __packed; |
| 1484 | |
| 1485 | /* Timer Sub-Structure, one per timer */ |
| 1486 | |
| 1487 | struct acpi_gtdt_timer_entry { |
| 1488 | u8 frame_number; |
| 1489 | u8 reserved[3]; |
| 1490 | u64 base_address; |
| 1491 | u64 el0_base_address; |
| 1492 | u32 timer_interrupt; |
| 1493 | u32 timer_flags; |
| 1494 | u32 virtual_timer_interrupt; |
| 1495 | u32 virtual_timer_flags; |
| 1496 | u32 common_flags; |
| 1497 | } __packed; |
| 1498 | |
| 1499 | /* Flag Definitions: timer_flags and virtual_timer_flags above */ |
| 1500 | |
| 1501 | #define ACPI_GTDT_GT_IRQ_MODE (1) |
| 1502 | #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) |
| 1503 | |
| 1504 | /* Flag Definitions: common_flags above */ |
| 1505 | |
| 1506 | #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) |
| 1507 | #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) |
| 1508 | |
| 1509 | /* 1: SBSA Generic Watchdog Structure */ |
| 1510 | |
| 1511 | struct acpi_gtdt_watchdog { |
| 1512 | struct acpi_gtdt_header header; |
| 1513 | u8 reserved; |
| 1514 | u64 refresh_frame_address; |
| 1515 | u64 control_frame_address; |
| 1516 | u32 timer_interrupt; |
| 1517 | u32 timer_flags; |
| 1518 | } __packed; |
| 1519 | |
| 1520 | /* Flag Definitions: timer_flags above */ |
| 1521 | |
| 1522 | #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) |
| 1523 | #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) |
| 1524 | #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) |
| 1525 | |
Arthur Heymans | 2e7e2d9 | 2022-03-03 22:28:27 +0100 | [diff] [blame] | 1526 | uintptr_t get_coreboot_rsdp(void); |
Rocky Phagura | eff0713 | 2021-01-10 15:42:50 -0800 | [diff] [blame] | 1527 | void acpi_create_einj(acpi_einj_t *einj, uintptr_t addr, u8 actions); |
| 1528 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1529 | unsigned long fw_cfg_acpi_tables(unsigned long start); |
| 1530 | |
| 1531 | /* These are implemented by the target port or north/southbridge. */ |
Raul E Rangel | 6b446b9 | 2021-11-19 11:38:35 -0700 | [diff] [blame] | 1532 | void preload_acpi_dsdt(void); |
Arthur Heymans | 7ebebf7 | 2023-06-17 14:08:46 +0200 | [diff] [blame] | 1533 | unsigned long write_acpi_tables(const unsigned long addr); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1534 | unsigned long acpi_fill_madt(unsigned long current); |
Arthur Heymans | cd46e5f | 2023-06-22 21:34:16 +0200 | [diff] [blame] | 1535 | unsigned long acpi_arch_fill_madt(acpi_madt_t *madt, unsigned long current); |
Kyösti Mälkki | f9aac92 | 2020-05-30 16:16:28 +0300 | [diff] [blame] | 1536 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1537 | void acpi_fill_fadt(acpi_fadt_t *fadt); |
Angel Pons | 79572e4 | 2020-07-13 00:17:43 +0200 | [diff] [blame] | 1538 | void arch_fill_fadt(acpi_fadt_t *fadt); |
Kyösti Mälkki | f9aac92 | 2020-05-30 16:16:28 +0300 | [diff] [blame] | 1539 | void soc_fill_fadt(acpi_fadt_t *fadt); |
Kyösti Mälkki | 02fd15d | 2020-06-02 03:34:43 +0300 | [diff] [blame] | 1540 | void mainboard_fill_fadt(acpi_fadt_t *fadt); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1541 | |
Kyösti Mälkki | 88decca | 2023-04-28 07:04:34 +0300 | [diff] [blame] | 1542 | void fill_fadt_extended_pm_io(acpi_fadt_t *fadt); |
| 1543 | |
Kyösti Mälkki | 2ab4a96 | 2020-06-30 11:41:47 +0300 | [diff] [blame] | 1544 | void acpi_fill_gnvs(void); |
Kyösti Mälkki | 3dc1792 | 2021-03-16 19:01:48 +0200 | [diff] [blame] | 1545 | void acpi_fill_cnvs(void); |
Kyösti Mälkki | 2ab4a96 | 2020-06-30 11:41:47 +0300 | [diff] [blame] | 1546 | |
Michael Niewöhner | f0a44ae | 2021-01-01 21:04:09 +0100 | [diff] [blame] | 1547 | unsigned long acpi_fill_lpit(unsigned long current); |
| 1548 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1549 | /* These can be used by the target port. */ |
| 1550 | u8 acpi_checksum(u8 *table, u32 length); |
| 1551 | |
| 1552 | void acpi_add_table(acpi_rsdp_t *rsdp, void *table); |
| 1553 | |
Jonathan Zhang | 3dcafa8 | 2022-05-11 13:11:20 -0700 | [diff] [blame] | 1554 | /* Create CXL Early Discovery Table */ |
| 1555 | void acpi_create_cedt(acpi_cedt_t *cedt, |
| 1556 | unsigned long (*acpi_fill_cedt)(unsigned long current)); |
| 1557 | /* Create a CXL Host Bridge Structure for CEDT */ |
| 1558 | int acpi_create_cedt_chbs(acpi_cedt_chbs_t *chbs, u32 uid, u32 cxl_ver, u64 base); |
| 1559 | /* Create a CXL Fixed Memory Window Structure for CEDT */ |
| 1560 | int acpi_create_cedt_cfmws(acpi_cedt_cfmws_t *cfmws, u64 base_hpa, u64 window_size, |
| 1561 | u8 eniw, u32 hbig, u16 restriction, u16 qtg_id, const u32 *interleave_target); |
| 1562 | |
Arthur Heymans | 92a3b67 | 2023-06-22 21:30:58 +0200 | [diff] [blame] | 1563 | |
Kyösti Mälkki | c7da027 | 2021-06-08 11:37:08 +0300 | [diff] [blame] | 1564 | int acpi_create_madt_ioapic_from_hw(acpi_madt_ioapic_t *ioapic, u32 addr); |
Kyösti Mälkki | 9ac1fb7 | 2023-04-07 22:39:53 +0300 | [diff] [blame] | 1565 | |
Kyösti Mälkki | 2e9f0d3 | 2023-04-07 23:05:46 +0300 | [diff] [blame] | 1566 | unsigned long acpi_create_madt_one_lapic(unsigned long current, u32 cpu, u32 apic); |
Kyösti Mälkki | 9ac1fb7 | 2023-04-07 22:39:53 +0300 | [diff] [blame] | 1567 | |
| 1568 | unsigned long acpi_create_madt_lapic_nmis(unsigned long current); |
| 1569 | |
Arthur Heymans | 3df6cc9 | 2023-06-27 16:44:59 +0200 | [diff] [blame] | 1570 | uintptr_t platform_get_gicd_base(void); |
| 1571 | uintptr_t platform_get_gicr_base(void); |
| 1572 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1573 | int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic); |
Naresh Solanki | 76835cc | 2023-01-20 19:13:02 +0100 | [diff] [blame] | 1574 | int acpi_create_srat_x2apic(acpi_srat_x2apic_t *x2apic, u32 node, u32 apic); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1575 | int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek, |
| 1576 | u32 flags); |
Jonathan Zhang | 3164b64 | 2021-04-21 17:51:31 -0700 | [diff] [blame] | 1577 | /* |
| 1578 | * Given the Generic Initiator device's BDF, the proximity domain's ID |
| 1579 | * and flag, create Generic Initiator Affinity structure in SRAT. |
| 1580 | */ |
| 1581 | int acpi_create_srat_gia_pci(acpi_srat_gia_t *gia, u32 proximity_domain, |
| 1582 | u16 seg, u8 bus, u8 dev, u8 func, u32 flags); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1583 | unsigned long acpi_create_srat_lapics(unsigned long current); |
| 1584 | void acpi_create_srat(acpi_srat_t *srat, |
| 1585 | unsigned long (*acpi_fill_srat)(unsigned long current)); |
| 1586 | |
| 1587 | void acpi_create_slit(acpi_slit_t *slit, |
| 1588 | unsigned long (*acpi_fill_slit)(unsigned long current)); |
| 1589 | |
Jonathan Zhang | 2a4e1f4 | 2021-04-01 11:43:37 -0700 | [diff] [blame] | 1590 | /* |
| 1591 | * Create a Memory Proximity Domain Attributes structure for HMAT, |
| 1592 | * given proximity domain for the attached initiaor, and |
| 1593 | * proximimity domain for the memory. |
| 1594 | */ |
| 1595 | int acpi_create_hmat_mpda(acpi_hmat_mpda_t *mpda, u32 initiator, u32 memory); |
Martin Roth | 0949e73 | 2021-10-01 14:28:22 -0600 | [diff] [blame] | 1596 | /* Create Heterogeneous Memory Attribute Table */ |
Jonathan Zhang | 2a4e1f4 | 2021-04-01 11:43:37 -0700 | [diff] [blame] | 1597 | void acpi_create_hmat(acpi_hmat_t *hmat, |
| 1598 | unsigned long (*acpi_fill_hmat)(unsigned long current)); |
| 1599 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1600 | void acpi_create_vfct(const struct device *device, |
| 1601 | acpi_vfct_t *vfct, |
| 1602 | unsigned long (*acpi_fill_vfct)(const struct device *device, |
| 1603 | acpi_vfct_t *vfct_struct, |
| 1604 | unsigned long current)); |
| 1605 | |
| 1606 | void acpi_create_ipmi(const struct device *device, |
| 1607 | struct acpi_spmi *spmi, |
| 1608 | const u16 ipmi_revision, |
| 1609 | const acpi_addr_t *addr, |
| 1610 | const enum acpi_ipmi_interface_type type, |
| 1611 | const s8 gpe_interrupt, |
| 1612 | const u32 apic_interrupt, |
| 1613 | const u32 uid); |
| 1614 | |
| 1615 | void acpi_create_ivrs(acpi_ivrs_t *ivrs, |
| 1616 | unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, |
| 1617 | unsigned long current)); |
| 1618 | |
Jason Glenesk | 61624b2 | 2020-11-02 20:06:23 -0800 | [diff] [blame] | 1619 | void acpi_create_crat(struct acpi_crat_header *crat, |
| 1620 | unsigned long (*acpi_fill_crat)(struct acpi_crat_header *crat_struct, |
| 1621 | unsigned long current)); |
| 1622 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1623 | unsigned long acpi_write_hpet(const struct device *device, unsigned long start, |
| 1624 | acpi_rsdp_t *rsdp); |
| 1625 | |
| 1626 | /* cpu/intel/speedstep/acpi.c */ |
| 1627 | void generate_cpu_entries(const struct device *device); |
| 1628 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1629 | unsigned long acpi_write_dbg2_pci_uart(acpi_rsdp_t *rsdp, unsigned long current, |
Arthur Heymans | 736d4d2 | 2023-06-30 15:37:38 +0200 | [diff] [blame] | 1630 | const struct device *dev, uint8_t access_size); |
| 1631 | unsigned long acpi_pl011_write_dbg2_uart(acpi_rsdp_t *rsdp, unsigned long current, |
| 1632 | uint64_t base, const char *name); |
| 1633 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1634 | void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags, |
| 1635 | unsigned long (*acpi_fill_dmar)(unsigned long)); |
| 1636 | unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags, |
| 1637 | u16 segment, u64 bar); |
| 1638 | unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment, |
| 1639 | u64 bar, u64 limit); |
| 1640 | unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags, |
| 1641 | u16 segment); |
| 1642 | unsigned long acpi_create_dmar_rhsa(unsigned long current, u64 base_addr, |
| 1643 | u32 proximity_domain); |
| 1644 | unsigned long acpi_create_dmar_andd(unsigned long current, u8 device_number, |
| 1645 | const char *device_name); |
John Zhao | 6edbb18 | 2021-03-24 11:55:09 -0700 | [diff] [blame] | 1646 | unsigned long acpi_create_dmar_satc(unsigned long current, u8 flags, |
John Zhao | 091532d | 2021-04-17 16:03:21 -0700 | [diff] [blame] | 1647 | u16 segment); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1648 | void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current); |
| 1649 | void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current); |
| 1650 | void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current); |
John Zhao | 6edbb18 | 2021-03-24 11:55:09 -0700 | [diff] [blame] | 1651 | void acpi_dmar_satc_fixup(unsigned long base, unsigned long current); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1652 | unsigned long acpi_create_dmar_ds_pci_br(unsigned long current, |
| 1653 | u8 bus, u8 dev, u8 fn); |
| 1654 | unsigned long acpi_create_dmar_ds_pci(unsigned long current, |
| 1655 | u8 bus, u8 dev, u8 fn); |
| 1656 | unsigned long acpi_create_dmar_ds_ioapic(unsigned long current, |
| 1657 | u8 enumeration_id, |
| 1658 | u8 bus, u8 dev, u8 fn); |
Arthur Heymans | bc8f859 | 2022-12-02 13:17:39 +0100 | [diff] [blame] | 1659 | unsigned long acpi_create_dmar_ds_ioapic_from_hw(unsigned long current, |
| 1660 | u32 addr, u8 bus, u8 dev, u8 fn); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1661 | unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current, |
| 1662 | u8 enumeration_id, |
| 1663 | u8 bus, u8 dev, u8 fn); |
| 1664 | void acpi_write_hest(acpi_hest_t *hest, |
| 1665 | unsigned long (*acpi_fill_hest)(acpi_hest_t *hest)); |
| 1666 | |
| 1667 | unsigned long acpi_create_hest_error_source(acpi_hest_t *hest, |
| 1668 | acpi_hest_esd_t *esd, u16 type, void *data, u16 len); |
| 1669 | |
Michael Niewöhner | f0a44ae | 2021-01-01 21:04:09 +0100 | [diff] [blame] | 1670 | unsigned long acpi_create_lpi_desc_ncst(acpi_lpi_desc_ncst_t *lpi_desc, uint16_t uid); |
| 1671 | |
Felix Held | f7dbf4a | 2021-06-07 16:56:04 +0200 | [diff] [blame] | 1672 | /* chipsets that select ACPI_BERT must implement this function */ |
Felix Held | 2940548 | 2021-05-28 16:01:57 +0200 | [diff] [blame] | 1673 | enum cb_err acpi_soc_get_bert_region(void **region, size_t *length); |
Francois Toguo | 522e0db | 2021-01-21 09:55:19 -0800 | [diff] [blame] | 1674 | |
Arthur Heymans | 2e3cb63 | 2023-06-30 15:01:08 +0200 | [diff] [blame] | 1675 | void acpi_soc_fill_gtdt(acpi_gtdt_t *gtdt); |
| 1676 | unsigned long acpi_soc_gtdt_add_timers(uint32_t *count, unsigned long current); |
| 1677 | unsigned long acpi_gtdt_add_timer_block(unsigned long current, const uint64_t address, |
| 1678 | struct acpi_gtdt_timer_entry *timers, size_t number); |
| 1679 | unsigned long acpi_gtdt_add_watchdog(unsigned long current, uint64_t refresh_frame, |
| 1680 | uint64_t control_frame, uint32_t gsiv, uint32_t flags); |
| 1681 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1682 | /* For ACPI S3 support. */ |
Kyösti Mälkki | a4c0e1a | 2020-06-18 08:28:12 +0300 | [diff] [blame] | 1683 | void __noreturn acpi_resume(void *wake_vec); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1684 | void mainboard_suspend_resume(void); |
| 1685 | void *acpi_find_wakeup_vector(void); |
| 1686 | |
| 1687 | /* ACPI_Sn assignments are defined to always equal the sleep state numbers */ |
| 1688 | enum { |
| 1689 | ACPI_S0 = 0, |
| 1690 | ACPI_S1 = 1, |
| 1691 | ACPI_S2 = 2, |
| 1692 | ACPI_S3 = 3, |
| 1693 | ACPI_S4 = 4, |
| 1694 | ACPI_S5 = 5, |
| 1695 | }; |
| 1696 | |
| 1697 | #if CONFIG(ACPI_INTEL_HARDWARE_SLEEP_VALUES) \ |
| 1698 | || CONFIG(ACPI_AMD_HARDWARE_SLEEP_VALUES) |
| 1699 | /* Given the provided PM1 control register return the ACPI sleep type. */ |
| 1700 | static inline int acpi_sleep_from_pm1(uint32_t pm1_cnt) |
| 1701 | { |
| 1702 | switch (((pm1_cnt) & SLP_TYP) >> SLP_TYP_SHIFT) { |
| 1703 | case SLP_TYP_S0: return ACPI_S0; |
| 1704 | case SLP_TYP_S1: return ACPI_S1; |
| 1705 | case SLP_TYP_S3: return ACPI_S3; |
| 1706 | case SLP_TYP_S4: return ACPI_S4; |
| 1707 | case SLP_TYP_S5: return ACPI_S5; |
| 1708 | } |
| 1709 | return -1; |
| 1710 | } |
| 1711 | #endif |
| 1712 | |
Kyösti Mälkki | e0d3868 | 2020-06-07 12:01:58 +0300 | [diff] [blame] | 1713 | uint8_t acpi_get_preferred_pm_profile(void); |
| 1714 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1715 | /* Returns ACPI_Sx values. */ |
| 1716 | int acpi_get_sleep_type(void); |
| 1717 | |
| 1718 | /* Read and clear GPE status */ |
| 1719 | int acpi_get_gpe(int gpe); |
| 1720 | |
Kyösti Mälkki | 0a9e72e | 2019-08-11 01:22:28 +0300 | [diff] [blame] | 1721 | /* Once we enter payload, is SMI handler installed and capable of |
| 1722 | responding to APM_CNT Advanced Power Management Control commands. */ |
| 1723 | static inline int permanent_smi_handler(void) |
| 1724 | { |
| 1725 | return CONFIG(HAVE_SMI_HANDLER); |
| 1726 | } |
| 1727 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1728 | static inline int acpi_s3_resume_allowed(void) |
| 1729 | { |
| 1730 | return CONFIG(HAVE_ACPI_RESUME); |
| 1731 | } |
| 1732 | |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1733 | static inline int acpi_is_wakeup_s3(void) |
| 1734 | { |
Kyösti Mälkki | 4a3f67a | 2020-06-18 13:44:29 +0300 | [diff] [blame] | 1735 | if (!acpi_s3_resume_allowed()) |
| 1736 | return 0; |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1737 | |
Kyösti Mälkki | 4a3f67a | 2020-06-18 13:44:29 +0300 | [diff] [blame] | 1738 | if (ENV_ROMSTAGE_OR_BEFORE) |
| 1739 | return (acpi_get_sleep_type() == ACPI_S3); |
| 1740 | |
Kyösti Mälkki | ac0dc4a | 2020-11-18 07:40:21 +0200 | [diff] [blame] | 1741 | return romstage_handoff_is_resume(); |
Kyösti Mälkki | 4a3f67a | 2020-06-18 13:44:29 +0300 | [diff] [blame] | 1742 | } |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1743 | |
| 1744 | static inline uintptr_t acpi_align_current(uintptr_t current) |
| 1745 | { |
| 1746 | return ALIGN_UP(current, 16); |
| 1747 | } |
| 1748 | |
| 1749 | /* ACPI table revisions should match the revision of the ACPI spec |
| 1750 | * supported. This function keeps the table versions synced. This could |
| 1751 | * be made into a weak function if there is ever a need to override the |
| 1752 | * coreboot default ACPI spec version supported. */ |
| 1753 | int get_acpi_table_revision(enum acpi_tables table); |
Elyes Haouas | 8b950f4 | 2022-02-16 12:08:16 +0100 | [diff] [blame] | 1754 | u8 get_acpi_fadt_minor_version(void); |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1755 | |
Kyösti Mälkki | 94e0465 | 2020-06-01 13:26:22 +0300 | [diff] [blame] | 1756 | #endif // !defined(__ASSEMBLER__) && !defined(__ACPI__) |
Furquan Shaikh | e084463 | 2020-05-02 10:23:37 -0700 | [diff] [blame] | 1757 | |
Furquan Shaikh | 56eafbb | 2020-04-30 18:38:55 -0700 | [diff] [blame] | 1758 | #endif /* __ACPI_ACPI_H__ */ |