acpi: Add SPCR table
TESTED works on IO and MMIO console with linux using 'earlycon=' in the
commandline argument.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I64e624c17a27b9215a8ba83bd6cbb2c0a7aa1dfc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75685
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index d3f209a..1704393 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -75,6 +75,7 @@
/* Tables defined by ACPI and used by coreboot */
BERT, CEDT, DBG2, DMAR, DSDT, EINJ, FACS, FADT, HEST, HMAT, HPET, IVRS,
MADT, MCFG, RSDP, RSDT, SLIT, SRAT, SSDT, TCPA, TPM2, XSDT, ECDT, LPIT,
+ SPCR,
/* Additional proprietary tables used by coreboot */
VFCT, NHLT, SPMI, CRAT
};
@@ -1328,6 +1329,12 @@
} __packed acpi_spcr_t;
_Static_assert(sizeof(acpi_spcr_t) == 88, "acpi_spcr_t must have an 88 byte size\n");
+#define PC_AT_COMPATIBLE_INTERRUPT (1 << 0)
+#define IO_APIC_COMPATIBLE_INTERRUPT (1 << 1)
+#define IO_SAPIC_COMPATIBLE_INTERRUPT (1 << 2)
+#define ARMH_GIC_COMPATIBLE_INTERRUPT (1 << 3)
+#define RISCV_PLIC_COMPATIBLE_INTERRUPT (1 << 4)
+
uintptr_t get_coreboot_rsdp(void);
void acpi_create_einj(acpi_einj_t *einj, uintptr_t addr, u8 actions);