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Stefan Reinaueraeba92a2009-04-17 08:37:18 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
Mike Loptience740c42014-01-03 16:54:56 -07005 * Copyright (C) 2014 Sage Electronic Engineering, LLC.
Stefan Reinaueraeba92a2009-04-17 08:37:18 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Stefan Reinaueraeba92a2009-04-17 08:37:18 +000019 */
20
21#ifndef PC80_I8259_H
22#define PC80_I8259_H
23
Mike Loptience740c42014-01-03 16:54:56 -070024/*
25 * IRQ numbers and common usage
26 * If an IRQ does not say it is 'Reserved'
27 * then it can be used by a device, though
28 * some systems may not adhere to this map.
29 */
30/* PIC IRQs */
31#define IRQ_DIS 0x1F /* IRQ is disabled */
32#define IRQ_0 0x00 /* Reserved - Timer IRQ */
33#define IRQ_1 0x01 /* Keyboard controller */
34#define IRQ_2 0x02 /* Reserved - Cascade to Slave PIC */
35#define IRQ_3 0x03 /* Serial Port 2 & 4 */
36#define IRQ_4 0x04 /* Serial Port 1 & 3 */
37#define IRQ_5 0x05 /* Parallel Port 2 & 3 or Sound Card */
38#define IRQ_6 0x06 /* Floppy Disk Controller */
39#define IRQ_7 0x07 /* Parallel Port 1 */
40#define IRQ_8 0x08 /* Reserved - RTC */
41#define IRQ_9 0x09 /* Reserved - ACPI System Control Interrupt */
42#define IRQ_10 0x0A /* Free or SCSI or NIC */
43#define IRQ_11 0x0B /* Free or SCSI or NIC */
44#define IRQ_12 0x0C /* PS/2 Mouse */
45#define IRQ_13 0x0D /* Reserved - CPU Floating Point Unit */
46#define IRQ_14 0x0E /* Primary ATA */
47#define IRQ_15 0x0F /* Secondary ATA */
48
49#define MASTER_PIC_ICW1 0x20
50#define SLAVE_PIC_ICW1 0xa0
51#define ICW_SELECT (1 << 4)
52#define OCW_SELECT (0 << 4)
53#define ADI (1 << 2)
54#define SNGL (1 << 1)
55#define IC4 (1 << 0)
56
57#define MASTER_PIC_ICW2 0x21
58#define SLAVE_PIC_ICW2 0xa1
59#define INT_VECTOR_MASTER 0x20
60#define IRQ0 0x00
61#define IRQ1 0x01
62#define INT_VECTOR_SLAVE 0x28
63#define IRQ8 0x00
64#define IRQ9 0x01
65
66#define MASTER_PIC_ICW3 0x21
67#define CASCADED_PIC (1 << 2)
68
69#define MASTER_PIC_ICW4 0x21
70#define SLAVE_PIC_ICW4 0xa1
71#define MICROPROCESSOR_MODE (1 << 0)
72
73#define SLAVE_PIC_ICW3 0xa1
74#define SLAVE_ID 0x02
75
76#define MASTER_PIC_OCW1 0x21
77#define SLAVE_PIC_OCW1 0xa1
78#define IRQ2 (1 << 2)
79#define ALL_IRQS 0xff
80
81#define ELCR1 0x4d0
82#define ELCR2 0x4d1
Stefan Reinaueraeba92a2009-04-17 08:37:18 +000083
Stefan Reinauer4d933dd2009-07-21 21:36:41 +000084#define IRQ_LEVEL_TRIGGERED 1
85#define IRQ_EDGE_TRIGGERED 0
Mike Loptience740c42014-01-03 16:54:56 -070086
87u16 pic_read_irq_mask(void);
88void pic_write_irq_mask(u16 mask);
89void pic_irq_enable(u8 int_num, u8 mask);
90void setup_i8259(void);
Stefan Reinauer4d933dd2009-07-21 21:36:41 +000091void i8259_configure_irq_trigger(int int_num, int is_level_triggered);
92
Stefan Reinaueraeba92a2009-04-17 08:37:18 +000093#endif /* PC80_I8259_H */