| Angel Pons | 80d9238 | 2020-04-05 15:47:00 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 2 | |
| 3 | /* Global Variables */ |
| 4 | |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 5 | Field (GNVS, ByteAcc, NoLock, Preserve) |
| 6 | { |
| 7 | /* Miscellaneous */ |
| Kyösti Mälkki | f6f1215 | 2020-12-29 09:04:30 +0200 | [diff] [blame] | 8 | , 16, // 0x00 - Operating System |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 9 | SMIF, 8, // 0x02 - SMI function |
| Angel Pons | 2fd1e47 | 2021-09-27 12:19:52 +0200 | [diff] [blame] | 10 | , 8, // 0x03 - SMI function parameter |
| 11 | , 8, // 0x04 - SMI function parameter |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 12 | SCIF, 8, // 0x05 - SCI function |
| Angel Pons | 2fd1e47 | 2021-09-27 12:19:52 +0200 | [diff] [blame] | 13 | , 8, // 0x06 - SCI function parameter |
| 14 | , 8, // 0x07 - SCI function parameter |
| Angel Pons | 286c771 | 2021-09-27 12:11:14 +0200 | [diff] [blame] | 15 | , 8, // 0x08 - Global Lock function for EC |
| Angel Pons | 2fd1e47 | 2021-09-27 12:19:52 +0200 | [diff] [blame] | 16 | , 8, // 0x09 - Lock function parameter |
| 17 | , 8, // 0x0a - Lock function parameter |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 18 | P80D, 32, // 0x0b - Debug port (IO 0x80) value |
| 19 | LIDS, 8, // 0x0f - LID state (open = 1) |
| Kyösti Mälkki | d6ccbb9 | 2021-01-15 13:46:11 +0200 | [diff] [blame] | 20 | , 8, // 0x10 - Power State (AC = 1) |
| Kyösti Mälkki | c196246 | 2020-12-29 05:12:56 +0200 | [diff] [blame] | 21 | , 8, // 0x11 - Processor count |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 22 | TPMP, 8, // 0x12 - TPM Present and Enabled |
| 23 | TLVL, 8, // 0x13 - Throttle Level |
| 24 | PPCM, 8, // 0x14 - Maximum P-state usable by OS |
| 25 | |
| 26 | /* Device Config */ |
| 27 | Offset (0x20), |
| 28 | S5U0, 8, // 0x20 - Enable USB0 in S5 |
| 29 | S5U1, 8, // 0x21 - Enable USB1 in S5 |
| 30 | S3U0, 8, // 0x22 - Enable USB0 in S3 |
| 31 | S3U1, 8, // 0x23 - Enable USB1 in S3 |
| 32 | TACT, 8, // 0x24 - Thermal Active trip point |
| 33 | TPSV, 8, // 0x25 - Thermal Passive trip point |
| 34 | TCRT, 8, // 0x26 - Thermal Critical trip point |
| 35 | DPTE, 8, // 0x27 - Enable DPTF |
| 36 | |
| 37 | /* Base addresses */ |
| 38 | Offset (0x30), |
| Kyösti Mälkki | 22ecdbe | 2021-01-27 21:24:08 +0200 | [diff] [blame] | 39 | , 32, // 0x30 - CBMEM TOC |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 40 | TOLM, 32, // 0x34 - Top of Low Memory |
| Arthur Heymans | cde4f3b | 2022-05-12 23:07:52 +0200 | [diff] [blame^] | 41 | , 32, // 0x38 - coreboot mem console pointer |
| Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 42 | MMOB, 32, // 0x3c - MMIO Base Low Base |
| 43 | MMOL, 32, // 0x40 - MMIO Base Low Limit |
| 44 | MMHB, 64, // 0x44 - MMIO Base High Base |
| 45 | MMHL, 64, // 0x4c - MMIO Base High Limit |
| 46 | TSGB, 32, // 0x54 - TSEG Base |
| 47 | TSSZ, 32, // 0x58 - TSEG Size |
| 48 | } |