Felix Held | 4a8cd72 | 2020-04-18 22:26:39 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 2 | |
| 3 | /* |
| 4 | * NOTE: The layout of the GNVS structure below must match the layout in |
Martin Roth | d7e3ead | 2019-04-22 16:32:58 -0600 | [diff] [blame] | 5 | * soc/amd/picasso/include/soc/nvs.h !!! |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 6 | * |
| 7 | */ |
| 8 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 9 | Field (GNVS, ByteAcc, NoLock, Preserve) |
| 10 | { |
| 11 | /* Miscellaneous */ |
Arthur Heymans | cde4f3b | 2022-05-12 23:07:52 +0200 | [diff] [blame^] | 12 | , 32, // 0x00 - 0x03 - coreboot Memory Console |
Felix Held | c5d71dc | 2023-01-20 20:47:22 +0100 | [diff] [blame] | 13 | PM1I, 64, // 0x04 - 0x0b - System Wake Source - PM1 Index |
| 14 | GPEI, 64, // 0x0c - 0x13 - GPE Wake Source |
| 15 | TMPS, 8, // 0x14 - Temperature Sensor ID |
| 16 | TCRT, 8, // 0x15 - Critical Threshold |
| 17 | TPSV, 8, // 0x16 - Passive Threshold |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 18 | } |