Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2015 - 2017 Intel Corp. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 17 | #include <cbmem.h> |
| 18 | #include <assert.h> |
| 19 | #include <device/device.h> |
| 20 | #include <device/pci_def.h> |
| 21 | #include <device/pci_ops.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 22 | #include <soc/pci_devs.h> |
| 23 | #include <soc/systemagent.h> |
| 24 | #include <soc/smm.h> |
| 25 | #include <lib.h> |
| 26 | |
| 27 | /* Returns base of requested region encoded in the system agent. */ |
| 28 | static inline uintptr_t system_agent_region_base(size_t reg) |
| 29 | { |
Elyes HAOUAS | 68c851b | 2018-06-12 22:06:09 +0200 | [diff] [blame] | 30 | #if defined(__SIMPLE_DEVICE__) |
| 31 | pci_devfn_t dev = SA_DEV_ROOT; |
| 32 | #else |
| 33 | struct device *dev = SA_DEV_ROOT; |
| 34 | #endif |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 35 | /* All regions concerned for have 1 MiB alignment. */ |
| 36 | return ALIGN_DOWN(pci_read_config32(dev, reg), 1 * MiB); |
| 37 | } |
| 38 | |
| 39 | /* Returns min power of 2 >= size */ |
| 40 | static inline u32 power_of_2(u32 size) |
| 41 | { |
| 42 | return size ? 1 << (1 + log2(size - 1)) : 0; |
| 43 | } |
| 44 | |
| 45 | u32 top_of_32bit_ram(void) |
| 46 | { |
| 47 | u32 iqat_region_size = 0; |
| 48 | u32 tseg_region_size = system_agent_region_base(TOLUD) - |
| 49 | system_agent_region_base(TSEGMB); |
| 50 | |
| 51 | /* |
| 52 | * Add IQAT region size if enabled. |
| 53 | */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame^] | 54 | #if CONFIG(IQAT_ENABLE) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 55 | iqat_region_size = CONFIG_IQAT_MEMORY_REGION_SIZE; |
| 56 | #endif |
| 57 | return system_agent_region_base(TOLUD) - |
| 58 | power_of_2(iqat_region_size + tseg_region_size); |
| 59 | } |
| 60 | |
| 61 | void *cbmem_top(void) { return (void *)top_of_32bit_ram(); } |
| 62 | |
| 63 | static inline uintptr_t smm_region_start(void) |
| 64 | { |
| 65 | return system_agent_region_base(TSEGMB); |
| 66 | } |
| 67 | |
| 68 | static inline size_t smm_region_size(void) |
| 69 | { |
| 70 | return system_agent_region_base(TOLUD) - smm_region_start(); |
| 71 | } |
| 72 | |
| 73 | void smm_region(void **start, size_t *size) |
| 74 | { |
| 75 | *start = (void *)smm_region_start(); |
| 76 | *size = smm_region_size(); |
| 77 | } |
| 78 | |
| 79 | int smm_subregion(int sub, void **start, size_t *size) |
| 80 | { |
| 81 | uintptr_t sub_base; |
| 82 | size_t sub_size; |
| 83 | const size_t cache_size = CONFIG_SMM_RESERVED_SIZE; |
| 84 | |
| 85 | sub_base = smm_region_start(); |
| 86 | sub_size = smm_region_size(); |
| 87 | |
| 88 | assert(sub_size > CONFIG_SMM_RESERVED_SIZE); |
| 89 | |
| 90 | switch (sub) { |
| 91 | case SMM_SUBREGION_HANDLER: |
| 92 | /* Handler starts at the base of TSEG. */ |
| 93 | sub_size -= cache_size; |
| 94 | break; |
| 95 | case SMM_SUBREGION_CACHE: |
| 96 | /* External cache is in the middle of TSEG. */ |
| 97 | sub_base += sub_size - cache_size; |
| 98 | sub_size = cache_size; |
| 99 | break; |
| 100 | default: |
| 101 | return -1; |
| 102 | } |
| 103 | |
| 104 | *start = (void *)sub_base; |
| 105 | *size = sub_size; |
| 106 | |
| 107 | return 0; |
| 108 | } |