blob: 3ee74a4426c1972756005cdf33e9ddbb050c1123 [file] [log] [blame]
Eric Gao61e6c442016-07-29 12:34:32 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2016 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <arch/io.h>
17#include <assert.h>
18#include <boardid.h>
19#include <console/console.h>
Julius Werner7feb86b2016-09-02 11:25:56 -070020#include <gpio.h>
Eric Gao61e6c442016-07-29 12:34:32 +080021#include <soc/grf.h>
22#include <soc/pwm.h>
23
24#include "pwm_regulator.h"
25
26/*
27 * Apparently a period of 3333 is determined by EEs to be ideal for our
28 * board design / resistors / capacitors / regulators but due to
29 * clock dividers we actually get 3337.
30 */
Caesar Wang8c454aa2017-01-04 18:26:04 +080031#define PWM_PERIOD 3337
32#define PWM_DESIGN_VOLTAGE_MIN_OUTDATED 8000
33#define PWM_DESIGN_VOLTAGE_MAX_OUTDATED 15000
Eric Gao61e6c442016-07-29 12:34:32 +080034
Lin Huangc93d79b2017-07-31 15:12:15 +080035/* Applies for Kevin rev6+ */
Caesar Wang8c454aa2017-01-04 18:26:04 +080036int kevin6_pwm_design_voltage[][2] = {
Julius Wernerf52288f2016-09-01 11:50:18 -070037 [PWM_REGULATOR_GPU] = {7858, 12177},
38 [PWM_REGULATOR_BIG] = {7987, 13022},
39 [PWM_REGULATOR_LIT] = {7991, 13037},
40 [PWM_REGULATOR_CENTERLOG] = {8001, 10497}
Eric Gao61e6c442016-07-29 12:34:32 +080041};
42
Lin Huangc93d79b2017-07-31 15:12:15 +080043/* Applies for Gru rev2+ and Bob. */
Caesar Wang8c454aa2017-01-04 18:26:04 +080044int pwm_design_voltage[][2] = {
45 [PWM_REGULATOR_GPU] = {7864, 12177},
46 [PWM_REGULATOR_BIG] = {8001, 13022},
47 [PWM_REGULATOR_LIT] = {7977, 13078},
48 [PWM_REGULATOR_CENTERLOG] = {7994, 10499}
49};
50
Lin Huangc93d79b2017-07-31 15:12:15 +080051/* Applies for Scarlet */
52int scarlet_pwm_design_voltage[][2] = {
53 [PWM_REGULATOR_GPU] = {7996, 10990},
54 [PWM_REGULATOR_BIG] = {8000, 12992},
55 [PWM_REGULATOR_LIT] = {8021, 11996},
56};
57
Julius Werner6486e782017-07-14 14:30:29 -070058int pwm_enum_to_pwm_number[] = {
59 [PWM_REGULATOR_GPU] = 0,
60 [PWM_REGULATOR_LIT] = 2,
61#if IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)
62 [PWM_REGULATOR_BIG] = 3,
63 [PWM_REGULATOR_CENTERLOG] = -1, /* fixed regulator on Scarlet */
64#else
65 [PWM_REGULATOR_BIG] = 1,
66 [PWM_REGULATOR_CENTERLOG] = 3,
67#endif
68};
69
Eric Gao61e6c442016-07-29 12:34:32 +080070void pwm_regulator_configure(enum pwm_regulator pwm, int millivolt)
71{
72 int duty_ns, voltage_max, voltage_min;
73 int voltage = millivolt * 10; /* for higer calculation accuracy */
Julius Werner6486e782017-07-14 14:30:29 -070074 int pwm_number = pwm_enum_to_pwm_number[pwm];
Eric Gao61e6c442016-07-29 12:34:32 +080075
Caesar Wang8c454aa2017-01-04 18:26:04 +080076 voltage_min = pwm_design_voltage[pwm][0];
77 voltage_max = pwm_design_voltage[pwm][1];
78 if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) && board_id() < 6) ||
79 (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) && board_id() < 2)) {
80 voltage_min = PWM_DESIGN_VOLTAGE_MIN_OUTDATED;
81 voltage_max = PWM_DESIGN_VOLTAGE_MAX_OUTDATED;
Patrick Georgi96af0af2017-02-23 17:44:13 +010082 } else if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) && board_id() >= 6) {
Caesar Wang8c454aa2017-01-04 18:26:04 +080083 voltage_min = kevin6_pwm_design_voltage[pwm][0];
84 voltage_max = kevin6_pwm_design_voltage[pwm][1];
Lin Huangc93d79b2017-07-31 15:12:15 +080085 } else if (IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET)) {
86 voltage_min = scarlet_pwm_design_voltage[pwm][0];
87 voltage_max = scarlet_pwm_design_voltage[pwm][1];
Eric Gao61e6c442016-07-29 12:34:32 +080088 }
89
90 assert(voltage <= voltage_max && voltage >= voltage_min);
91
92 /*
93 * Intentionally round down (higher volt) to be safe.
94 * eg, for the default min & max design voltage:
95 * period = 3337, volt = 1.1: 1906
96 * period = 3337, volt = 1.0: 2383
97 * period = 3337, volt = 0.9: 2860
98 */
99 duty_ns = PWM_PERIOD * (voltage_max - voltage)
100 / (voltage_max - voltage_min);
101
Julius Werner6486e782017-07-14 14:30:29 -0700102 pwm_init(pwm_number, PWM_PERIOD, duty_ns);
Douglas Anderson1eb69b42016-09-06 13:51:03 -0700103
Julius Werner6486e782017-07-14 14:30:29 -0700104 switch (pwm_number) {
105 case 0:
Julius Werner7feb86b2016-09-02 11:25:56 -0700106 gpio_input(GPIO(4, C, 2)); /* PWM0 remove pull-down */
Douglas Anderson1eb69b42016-09-06 13:51:03 -0700107 write32(&rk3399_grf->iomux_pwm_0, IOMUX_PWM_0);
108 break;
Julius Werner6486e782017-07-14 14:30:29 -0700109 case 1:
Julius Werner7feb86b2016-09-02 11:25:56 -0700110 gpio_input(GPIO(4, C, 6)); /* PWM1 remove pull-down */
Douglas Anderson1eb69b42016-09-06 13:51:03 -0700111 write32(&rk3399_grf->iomux_pwm_1, IOMUX_PWM_1);
112 break;
Julius Werner6486e782017-07-14 14:30:29 -0700113 case 2:
Julius Werner7feb86b2016-09-02 11:25:56 -0700114 gpio_input(GPIO(1, C, 3)); /* PWM2 remove pull-down */
Douglas Anderson1eb69b42016-09-06 13:51:03 -0700115 write32(&rk3399_pmugrf->iomux_pwm_2, IOMUX_PWM_2);
116 break;
Julius Werner6486e782017-07-14 14:30:29 -0700117 case 3:
Julius Werner7feb86b2016-09-02 11:25:56 -0700118 gpio_input(GPIO(0, A, 6)); /* PWM3 remove pull-down */
Douglas Anderson1eb69b42016-09-06 13:51:03 -0700119 write32(&rk3399_pmugrf->iomux_pwm_3a, IOMUX_PWM_3_A);
120 break;
Julius Werner6486e782017-07-14 14:30:29 -0700121 default:
122 die("incorrect board configuration");
Douglas Anderson1eb69b42016-09-06 13:51:03 -0700123 }
Eric Gao61e6c442016-07-29 12:34:32 +0800124}