Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Elyes Haouas | 5a04746 | 2022-12-28 11:43:49 +0100 | [diff] [blame] | 3 | #include <device/dram/ddr2.h> |
Elyes Haouas | f82e68c | 2022-12-28 12:33:58 +0100 | [diff] [blame] | 4 | #include <device/dram/ddr3.h> |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 5 | #include <dimm_info_util.h> |
| 6 | #include <spd.h> |
| 7 | #include <tests/test.h> |
| 8 | |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 9 | #define MAX_ALLOWED_MODULE_TYPE 3 |
| 10 | |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 11 | static void test_smbios_bus_width_to_spd_width_parametrized(smbios_memory_type ddr_type) |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 12 | { |
| 13 | /* Non-ECC variants */ |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 14 | assert_int_equal(MEMORY_BUS_WIDTH_64, smbios_bus_width_to_spd_width(ddr_type, 64, 64)); |
| 15 | assert_int_equal(MEMORY_BUS_WIDTH_32, smbios_bus_width_to_spd_width(ddr_type, 32, 32)); |
| 16 | assert_int_equal(MEMORY_BUS_WIDTH_16, smbios_bus_width_to_spd_width(ddr_type, 16, 16)); |
| 17 | assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 8, 8)); |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 18 | /* Incorrect data width. Fallback to 8-bit */ |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 19 | assert_int_equal(MEMORY_BUS_WIDTH_8, smbios_bus_width_to_spd_width(ddr_type, 15, 15)); |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 20 | |
| 21 | /* ECC variants */ |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 22 | uint8_t extension_8bits = SPD_ECC_8BIT; |
| 23 | if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5) |
| 24 | extension_8bits = SPD_ECC_8BIT_LP5_DDR5; |
| 25 | |
| 26 | assert_int_equal(MEMORY_BUS_WIDTH_64 | extension_8bits, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 27 | smbios_bus_width_to_spd_width(ddr_type, 64 + 8, 64)); |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 28 | assert_int_equal(MEMORY_BUS_WIDTH_32 | extension_8bits, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 29 | smbios_bus_width_to_spd_width(ddr_type, 32 + 8, 32)); |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 30 | assert_int_equal(MEMORY_BUS_WIDTH_16 | extension_8bits, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 31 | smbios_bus_width_to_spd_width(ddr_type, 16 + 8, 16)); |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 32 | assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 33 | smbios_bus_width_to_spd_width(ddr_type, 8 + 8, 8)); |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 34 | /* Incorrect data width. Fallback to 8-bit */ |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 35 | assert_int_equal(MEMORY_BUS_WIDTH_8 | extension_8bits, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 36 | smbios_bus_width_to_spd_width(ddr_type, 15 + 8, 15)); |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | static void test_smbios_bus_width_to_spd_width(void **state) |
| 40 | { |
| 41 | smbios_memory_type memory_type[] = { |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 42 | MEMORY_TYPE_DDR2, MEMORY_TYPE_DDR3, MEMORY_TYPE_DDR4, MEMORY_TYPE_DDR5, |
| 43 | MEMORY_TYPE_LPDDR3, MEMORY_TYPE_LPDDR4, MEMORY_TYPE_LPDDR5, |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 44 | }; |
| 45 | |
| 46 | for (int i = 0; i < ARRAY_SIZE(memory_type); i++) { |
| 47 | print_message("test_smbios_bus_width_to_spd_width_parametrized(%d)\n", |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 48 | memory_type[i]); |
Subrata Banik | 3306f37 | 2021-10-26 13:19:20 +0530 | [diff] [blame] | 49 | test_smbios_bus_width_to_spd_width_parametrized(memory_type[i]); |
| 50 | } |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 51 | } |
| 52 | |
| 53 | static void test_smbios_memory_size_to_mib(void **state) |
| 54 | { |
| 55 | uint32_t extended_size; |
| 56 | uint16_t memory_size; |
| 57 | |
| 58 | /* Unknown memory size */ |
| 59 | assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0)); |
| 60 | assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 0xFFFF)); |
| 61 | assert_int_equal(0, smbios_memory_size_to_mib(0xFFFF, 87642)); |
| 62 | |
| 63 | /* 32GiB - 1MiB */ |
| 64 | extended_size = 0; |
| 65 | assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size)); |
| 66 | extended_size = 0xFFFFFFFF; |
| 67 | assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size)); |
| 68 | extended_size = 0xDEDE6666; |
| 69 | assert_int_equal(extended_size, smbios_memory_size_to_mib(0x7FFF, extended_size)); |
| 70 | |
| 71 | /* Memory size in KiB when MSB is flipped */ |
| 72 | memory_size = 0x0 & 0x8000; /* Zero bytes */ |
| 73 | assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0)); |
| 74 | assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF)); |
| 75 | assert_int_equal(0, smbios_memory_size_to_mib(memory_size, 2345568)); |
| 76 | memory_size = (31 * KiB) | 0x8000; |
| 77 | assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0)); |
| 78 | assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF)); |
| 79 | assert_int_equal(31, smbios_memory_size_to_mib(memory_size, 72594344)); |
| 80 | |
| 81 | /* Value in MiB Only when memory size is not 0xFFFF and 0x7FFF and MSB is not set */ |
| 82 | memory_size = 32766; /* value in MiB */ |
| 83 | assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0)); |
| 84 | assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 0xFFFFFFFF)); |
| 85 | assert_int_equal(memory_size, smbios_memory_size_to_mib(memory_size, 694735)); |
| 86 | } |
| 87 | |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 88 | static void test_smbios_form_factor_to_spd_mod_type_ddr(smbios_memory_type memory_type) |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 89 | { |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 90 | const smbios_memory_form_factor undefined_factors[] = { |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 91 | MEMORY_FORMFACTOR_OTHER, MEMORY_FORMFACTOR_UNKNOWN, |
| 92 | MEMORY_FORMFACTOR_SIMM, MEMORY_FORMFACTOR_SIP, |
| 93 | MEMORY_FORMFACTOR_CHIP, MEMORY_FORMFACTOR_DIP, |
| 94 | MEMORY_FORMFACTOR_ZIP, MEMORY_FORMFACTOR_PROPRIETARY_CARD, |
| 95 | MEMORY_FORMFACTOR_TSOP, MEMORY_FORMFACTOR_ROC, |
| 96 | MEMORY_FORMFACTOR_SRIMM, MEMORY_FORMFACTOR_FBDIMM, |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 97 | MEMORY_FORMFACTOR_DIE, |
| 98 | }; |
| 99 | for (int i = 0; i < ARRAY_SIZE(undefined_factors); ++i) { |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 100 | assert_int_equal(SPD_UNDEFINED, smbios_form_factor_to_spd_mod_type( |
| 101 | memory_type, undefined_factors[i])); |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 102 | } |
| 103 | } |
| 104 | |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 105 | static void test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized( |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 106 | smbios_memory_type memory_type, const LargestIntegralType udimm_allowed[], |
| 107 | const LargestIntegralType rdimm_allowed[], LargestIntegralType expected_module_type) |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 108 | { |
| 109 | print_message("%s(%d)\n", __func__, memory_type); |
| 110 | |
| 111 | assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_DIMM), |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 112 | udimm_allowed, MAX_ALLOWED_MODULE_TYPE); |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 113 | |
| 114 | assert_in_set(smbios_form_factor_to_spd_mod_type(memory_type, MEMORY_FORMFACTOR_RIMM), |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 115 | rdimm_allowed, MAX_ALLOWED_MODULE_TYPE); |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 116 | |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 117 | assert_int_equal(expected_module_type, smbios_form_factor_to_spd_mod_type( |
| 118 | memory_type, MEMORY_FORMFACTOR_SODIMM)); |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 119 | |
| 120 | test_smbios_form_factor_to_spd_mod_type_ddr(memory_type); |
| 121 | } |
| 122 | |
| 123 | static void test_smbios_form_factor_to_spd_mod_type_lpddrx(smbios_memory_type memory_type) |
| 124 | { |
| 125 | print_message("%s(%d)\n", __func__, memory_type); |
| 126 | /* Form factors defined in coreboot */ |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 127 | assert_int_equal(LPX_SPD_NONDIMM, smbios_form_factor_to_spd_mod_type( |
| 128 | memory_type, MEMORY_FORMFACTOR_ROC)); |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | static void test_smbios_form_factor_to_spd_mod_type(void **state) |
| 132 | { |
| 133 | const struct smbios_form_factor_test_info_ddrx { |
| 134 | smbios_memory_type memory_type; |
| 135 | const LargestIntegralType udimm_allowed[MAX_ALLOWED_MODULE_TYPE]; |
| 136 | const LargestIntegralType rdimm_allowed[MAX_ALLOWED_MODULE_TYPE]; |
| 137 | LargestIntegralType expected_module_type; |
| 138 | } ddrx_info[] = { |
| 139 | { |
| 140 | .memory_type = MEMORY_TYPE_DDR2, |
Elyes Haouas | 5a04746 | 2022-12-28 11:43:49 +0100 | [diff] [blame] | 141 | .udimm_allowed = {SPD_DDR2_DIMM_TYPE_UDIMM, |
| 142 | SPD_DDR2_DIMM_TYPE_MICRO_DIMM, |
| 143 | SPD_DDR2_DIMM_TYPE_MINI_UDIMM}, |
| 144 | .rdimm_allowed = {SPD_DDR2_DIMM_TYPE_RDIMM, |
| 145 | SPD_DDR2_DIMM_TYPE_MINI_RDIMM}, |
| 146 | .expected_module_type = SPD_DDR2_DIMM_TYPE_SO_DIMM, |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 147 | }, |
| 148 | { |
| 149 | .memory_type = MEMORY_TYPE_DDR3, |
Elyes Haouas | f82e68c | 2022-12-28 12:33:58 +0100 | [diff] [blame] | 150 | .udimm_allowed = {SPD_DDR3_DIMM_TYPE_UDIMM, |
| 151 | SPD_DDR3_DIMM_TYPE_MICRO_DIMM, |
| 152 | SPD_DDR3_DIMM_TYPE_MINI_UDIMM}, |
| 153 | .rdimm_allowed = {SPD_DDR3_DIMM_TYPE_RDIMM, |
| 154 | SPD_DDR3_DIMM_TYPE_MINI_RDIMM}, |
| 155 | .expected_module_type = SPD_DDR3_DIMM_TYPE_SO_DIMM, |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 156 | }, |
| 157 | { |
| 158 | .memory_type = MEMORY_TYPE_DDR4, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 159 | .udimm_allowed = {DDR4_SPD_UDIMM, DDR4_SPD_MINI_UDIMM}, |
| 160 | .rdimm_allowed = {DDR4_SPD_RDIMM, DDR4_SPD_MINI_RDIMM}, |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 161 | .expected_module_type = DDR4_SPD_SODIMM, |
| 162 | }, |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 163 | {.memory_type = MEMORY_TYPE_DDR5, |
| 164 | .udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM}, |
| 165 | .rdimm_allowed = {DDR5_SPD_RDIMM, DDR5_SPD_MINI_RDIMM}, |
| 166 | .expected_module_type = DDR5_SPD_SODIMM}, |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 167 | }; |
| 168 | |
| 169 | /* Test for DDRx DIMM Modules */ |
| 170 | for (int i = 0; i < ARRAY_SIZE(ddrx_info); i++) |
| 171 | test_smbios_form_factor_to_spd_mod_type_ddrx_parametrized( |
Jakub Czapiga | c08b6a7 | 2022-01-10 13:36:47 +0000 | [diff] [blame] | 172 | ddrx_info[i].memory_type, ddrx_info[i].udimm_allowed, |
| 173 | ddrx_info[i].rdimm_allowed, ddrx_info[i].expected_module_type); |
Subrata Banik | 6de8b42 | 2021-10-26 20:46:21 +0530 | [diff] [blame] | 174 | |
| 175 | smbios_memory_type lpddrx_memory_type[] = { |
| 176 | MEMORY_TYPE_LPDDR3, |
| 177 | MEMORY_TYPE_LPDDR4, |
| 178 | MEMORY_TYPE_LPDDR5, |
| 179 | }; |
| 180 | |
| 181 | /* Test for Lpddrx DIMM Modules */ |
| 182 | for (int i = 0; i < ARRAY_SIZE(lpddrx_memory_type); i++) |
| 183 | test_smbios_form_factor_to_spd_mod_type_lpddrx(lpddrx_memory_type[i]); |
| 184 | } |
| 185 | |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 186 | int main(void) |
| 187 | { |
| 188 | const struct CMUnitTest tests[] = { |
| 189 | cmocka_unit_test(test_smbios_bus_width_to_spd_width), |
| 190 | cmocka_unit_test(test_smbios_memory_size_to_mib), |
| 191 | cmocka_unit_test(test_smbios_form_factor_to_spd_mod_type), |
| 192 | }; |
| 193 | |
Jakub Czapiga | 7c6081e | 2021-08-25 16:27:35 +0200 | [diff] [blame] | 194 | return cb_run_group_tests(tests, NULL, NULL); |
Jakub Czapiga | dadcae6 | 2021-04-08 16:29:03 +0200 | [diff] [blame] | 195 | } |