Karthikeyan Ramasubramanian | af0d516 | 2020-11-04 17:05:35 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Ben Kao | 6eb5253 | 2021-07-04 21:24:36 +0800 | [diff] [blame] | 3 | #include <console/console.h> |
| 4 | #include <device/mmio.h> |
Karthikeyan Ramasubramanian | af0d516 | 2020-11-04 17:05:35 -0700 | [diff] [blame] | 5 | #include <intelblocks/xhci.h> |
Ben Kao | 6eb5253 | 2021-07-04 21:24:36 +0800 | [diff] [blame] | 6 | #include <soc/soc_chip.h> |
Karthikeyan Ramasubramanian | af0d516 | 2020-11-04 17:05:35 -0700 | [diff] [blame] | 7 | |
| 8 | #define XHCI_USB2_PORT_STATUS_REG 0x480 |
| 9 | #define XHCI_USB3_PORT_STATUS_REG 0x500 |
| 10 | #define XHCI_USB2_PORT_NUM 8 |
| 11 | #define XHCI_USB3_PORT_NUM 6 |
| 12 | |
Ben Kao | 6eb5253 | 2021-07-04 21:24:36 +0800 | [diff] [blame] | 13 | #define XHCI_PMCTRL 0x80A4 |
| 14 | /* BIT[7:4] LFPS periodic sampling off time for USB3 Ports */ |
| 15 | #define PMCTRL_LFPS_OFFTIME_SHIFT 4 |
| 16 | #define PMCTRL_LFPS_OFFTIME_MAX 0xF |
| 17 | |
Karthikeyan Ramasubramanian | af0d516 | 2020-11-04 17:05:35 -0700 | [diff] [blame] | 18 | static const struct xhci_usb_info usb_info = { |
| 19 | .usb2_port_status_reg = XHCI_USB2_PORT_STATUS_REG, |
| 20 | .num_usb2_ports = XHCI_USB2_PORT_NUM, |
| 21 | .usb3_port_status_reg = XHCI_USB3_PORT_STATUS_REG, |
| 22 | .num_usb3_ports = XHCI_USB3_PORT_NUM, |
| 23 | }; |
| 24 | |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 25 | const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev) |
Karthikeyan Ramasubramanian | af0d516 | 2020-11-04 17:05:35 -0700 | [diff] [blame] | 26 | { |
Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 27 | /* Jasper Lake only has one XHCI controller */ |
Karthikeyan Ramasubramanian | af0d516 | 2020-11-04 17:05:35 -0700 | [diff] [blame] | 28 | return &usb_info; |
| 29 | } |
Ben Kao | 6eb5253 | 2021-07-04 21:24:36 +0800 | [diff] [blame] | 30 | |
| 31 | static void set_xhci_lfps_sampling_offtime(struct device *dev, uint8_t time_ms) |
| 32 | { |
| 33 | void *addr; |
Angel Pons | c1bfbe0 | 2021-11-03 13:18:53 +0100 | [diff] [blame] | 34 | const struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); |
Ben Kao | 6eb5253 | 2021-07-04 21:24:36 +0800 | [diff] [blame] | 35 | |
| 36 | if (!res) |
| 37 | return; |
| 38 | |
| 39 | if (time_ms > PMCTRL_LFPS_OFFTIME_MAX) { |
| 40 | printk(BIOS_ERR, |
| 41 | "XHCI: The maximum LFPS sampling OFF time is %u ms, " |
| 42 | "cannot set it to %u ms\n", |
| 43 | PMCTRL_LFPS_OFFTIME_MAX, time_ms); |
| 44 | |
| 45 | return; |
| 46 | } |
| 47 | |
| 48 | addr = (void *)(uintptr_t)(res->base + XHCI_PMCTRL); |
| 49 | clrsetbits32(addr, |
| 50 | PMCTRL_LFPS_OFFTIME_MAX << PMCTRL_LFPS_OFFTIME_SHIFT, |
| 51 | time_ms << PMCTRL_LFPS_OFFTIME_SHIFT); |
| 52 | printk(BIOS_DEBUG, |
| 53 | "XHCI: Updated LFPS sampling OFF time to %u ms\n", time_ms); |
| 54 | } |
| 55 | |
| 56 | void soc_xhci_init(struct device *dev) |
| 57 | { |
| 58 | const config_t *config = config_of_soc(); |
| 59 | |
| 60 | /* Set xHCI LFPS period sampling off time */ |
| 61 | set_xhci_lfps_sampling_offtime(dev, |
| 62 | config->xhci_lfps_sampling_offtime_ms); |
| 63 | } |