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review.coreboot.org / coreboot / c8a695550f819b8c61c8f8a13d622402ef684f99 / . / src / soc / intel / apollolake / gspi.c
blob: e29b72f6b8bdfce27fb981685f0e6e6abc7c4e07 [file] [log] [blame]
Patrick Georgiac959032020-05-05 22:49:26 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-or-later */
Ravi Sarawadi3669a062018-02-27 13:23:42 -0800[diff] [blame]2
Ravi Sarawadi3669a062018-02-27 13:23:42 -0800[diff] [blame]3#include <intelblocks/gspi.h>
Ravi Sarawadi3669a062018-02-27 13:23:42 -0800[diff] [blame]4#include <soc/pci_devs.h>
Ravi Sarawadi3669a062018-02-27 13:23:42 -0800[diff] [blame]5
6int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
7{
Subrata Banik9ab6d922018-05-08 20:08:49 +0530[diff] [blame]8 switch (gspi_bus) {
9 case 0:
10 return PCH_DEVFN_SPI0;
11 case 1:
12 return PCH_DEVFN_SPI1;
13 case 2:
14 return PCH_DEVFN_SPI2;
15 }
16 return -1;
Ravi Sarawadi3669a062018-02-27 13:23:42 -0800[diff] [blame]17}