Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 2 | |
Dinesh Gehlot | 58cc96f | 2023-01-17 04:01:13 +0000 | [diff] [blame] | 3 | #include <gpio.h> |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 4 | #include <intelblocks/pcr.h> |
| 5 | #include <soc/pcr_ids.h> |
| 6 | #include <soc/pm.h> |
| 7 | |
| 8 | static const struct reset_mapping rst_map[] = { |
Aaron Durbin | b5a5aa6 | 2017-07-14 17:29:29 -0600 | [diff] [blame] | 9 | { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 }, |
| 10 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 }, |
| 11 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 }, |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 12 | }; |
| 13 | |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 14 | static const struct pad_group apl_community_n_groups[] = { |
| 15 | INTEL_GPP(N_OFFSET, N_OFFSET, GPIO_31), /* NORTH 0 */ |
| 16 | INTEL_GPP(N_OFFSET, GPIO_32, TRST_B), /* NORTH 1 */ |
| 17 | INTEL_GPP(N_OFFSET, TMS, SVID0_CLK), /* NORTH 2 */ |
| 18 | }; |
| 19 | |
| 20 | static const struct pad_group apl_community_w_groups[] = { |
| 21 | INTEL_GPP(W_OFFSET, W_OFFSET, OSC_CLK_OUT_1),/* WEST 0 */ |
| 22 | INTEL_GPP(W_OFFSET, OSC_CLK_OUT_2, SUSPWRDNACK),/* WEST 1 */ |
| 23 | }; |
| 24 | |
| 25 | static const struct pad_group apl_community_sw_groups[] = { |
| 26 | INTEL_GPP(SW_OFFSET, SW_OFFSET, SMB_ALERTB), /* SOUTHWEST 0 */ |
| 27 | INTEL_GPP(SW_OFFSET, SMB_CLK, LPC_FRAMEB), /* SOUTHWEST 1 */ |
| 28 | }; |
| 29 | |
| 30 | static const struct pad_group apl_community_nw_groups[] = { |
| 31 | INTEL_GPP(NW_OFFSET, NW_OFFSET, PROCHOT_B), /* NORTHWEST 0 */ |
| 32 | INTEL_GPP(NW_OFFSET, PMIC_I2C_SCL, GPIO_106),/* NORTHWEST 1 */ |
| 33 | INTEL_GPP(NW_OFFSET, GPIO_109, GPIO_123), /* NORTHWEST 2 */ |
| 34 | }; |
| 35 | |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 36 | static const struct pad_community apl_gpio_communities[] = { |
| 37 | { |
| 38 | .port = PID_GPIO_SW, |
| 39 | .first_pad = SW_OFFSET, |
| 40 | .last_pad = LPC_FRAMEB, |
| 41 | .num_gpi_regs = NUM_SW_GPI_REGS, |
| 42 | .gpi_status_offset = 0, |
| 43 | .pad_cfg_base = PAD_CFG_BASE, |
| 44 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 45 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 46 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 47 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 48 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 49 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 50 | .name = "GPIO_GPE_SW", |
| 51 | .acpi_path = "\\_SB.GPO3", |
| 52 | .reset_map = rst_map, |
| 53 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 54 | .groups = apl_community_sw_groups, |
| 55 | .num_groups = ARRAY_SIZE(apl_community_sw_groups), |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 56 | }, { |
| 57 | .port = PID_GPIO_W, |
| 58 | .first_pad = W_OFFSET, |
| 59 | .last_pad = SUSPWRDNACK, |
| 60 | .num_gpi_regs = NUM_W_GPI_REGS, |
| 61 | .gpi_status_offset = NUM_SW_GPI_REGS, |
| 62 | .pad_cfg_base = PAD_CFG_BASE, |
| 63 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 64 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 65 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 66 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 67 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 68 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 69 | .name = "GPIO_GPE_W", |
| 70 | .acpi_path = "\\_SB.GPO2", |
| 71 | .reset_map = rst_map, |
| 72 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 73 | .groups = apl_community_w_groups, |
| 74 | .num_groups = ARRAY_SIZE(apl_community_w_groups), |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 75 | }, { |
| 76 | .port = PID_GPIO_NW, |
| 77 | .first_pad = NW_OFFSET, |
| 78 | .last_pad = GPIO_123, |
| 79 | .num_gpi_regs = NUM_NW_GPI_REGS, |
| 80 | .gpi_status_offset = NUM_W_GPI_REGS + NUM_SW_GPI_REGS, |
| 81 | .pad_cfg_base = PAD_CFG_BASE, |
| 82 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 83 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 84 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 85 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 86 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 87 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 88 | .name = "GPIO_GPE_NW", |
| 89 | .acpi_path = "\\_SB.GPO1", |
| 90 | .reset_map = rst_map, |
| 91 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 92 | .groups = apl_community_nw_groups, |
| 93 | .num_groups = ARRAY_SIZE(apl_community_nw_groups), |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 94 | }, { |
| 95 | .port = PID_GPIO_N, |
| 96 | .first_pad = N_OFFSET, |
| 97 | .last_pad = SVID0_CLK, |
| 98 | .num_gpi_regs = NUM_N_GPI_REGS, |
| 99 | .gpi_status_offset = NUM_NW_GPI_REGS + NUM_W_GPI_REGS |
| 100 | + NUM_SW_GPI_REGS, |
| 101 | .pad_cfg_base = PAD_CFG_BASE, |
| 102 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 103 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 104 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 105 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 106 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
| 107 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 108 | .name = "GPIO_GPE_N", |
| 109 | .acpi_path = "\\_SB.GPO0", |
| 110 | .reset_map = rst_map, |
| 111 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 112 | .groups = apl_community_n_groups, |
| 113 | .num_groups = ARRAY_SIZE(apl_community_n_groups), |
Hannah Williams | 12bed18 | 2017-05-26 20:31:15 -0700 | [diff] [blame] | 114 | } |
| 115 | }; |
| 116 | |
| 117 | const struct pad_community *soc_gpio_get_community(size_t *num_communities) |
| 118 | { |
| 119 | *num_communities = ARRAY_SIZE(apl_gpio_communities); |
| 120 | return apl_gpio_communities; |
| 121 | } |
| 122 | |
| 123 | const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) |
| 124 | { |
| 125 | static const struct pmc_to_gpio_route routes[] = { |
| 126 | { PMC_GPE_SW_31_0, GPIO_GPE_SW_31_0 }, |
| 127 | { PMC_GPE_SW_63_32, GPIO_GPE_SW_63_32 }, |
| 128 | { PMC_GPE_NW_31_0, GPIO_GPE_NW_31_0 }, |
| 129 | { PMC_GPE_NW_63_32, GPIO_GPE_NW_63_32 }, |
| 130 | { PMC_GPE_NW_95_64, GPIO_GPE_NW_95_64 }, |
| 131 | { PMC_GPE_N_31_0, GPIO_GPE_N_31_0 }, |
| 132 | { PMC_GPE_N_63_32, GPIO_GPE_N_63_32 }, |
| 133 | { PMC_GPE_W_31_0, GPIO_GPE_W_31_0 }, |
| 134 | }; |
| 135 | *num = ARRAY_SIZE(routes); |
| 136 | return routes; |
| 137 | } |