David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <baseboard/gpio.h> |
| 4 | #include <baseboard/variants.h> |
| 5 | #include <commonlib/helpers.h> |
| 6 | |
| 7 | /* Pad configuration in ramstage */ |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 8 | static const struct pad_config override_gpio_table[] = { |
| 9 | /* A7 : I2S2_SCLK ==> EN_PP3300_TRACKPAD */ |
| 10 | PAD_CFG_GPO(GPP_A7, 1, DEEP), |
| 11 | /* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */ |
| 12 | PAD_CFG_GPO(GPP_A8, 1, DEEP), |
| 13 | /* A10 : I2S2_RXD ==> EN_SPKR_PA */ |
| 14 | PAD_CFG_GPO(GPP_A10, 1, DEEP), |
| 15 | /* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */ |
| 16 | PAD_CFG_GPO(GPP_A13, 1, DEEP), |
| 17 | /* A16 : USB_OC3# ==> USB_C0_OC_ODL */ |
| 18 | PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), |
| 19 | /* A18 : DDSP_HPDB ==> HDMI_HPD */ |
| 20 | PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 21 | /* A21 : DDPC_CTRCLK ==> EN_FP_PWR */ |
| 22 | PAD_CFG_GPO(GPP_A21, 1, DEEP), |
| 23 | /* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */ |
| 24 | PAD_CFG_GPO(GPP_A22, 1, DEEP), |
| 25 | /* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */ |
| 26 | PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1), |
David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 27 | |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 28 | /* B2 : VRALERT# ==> EN_PP3300_SSD */ |
| 29 | PAD_CFG_GPO(GPP_B2, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 30 | /* B3 : CPU_GP2 ==> PEN_DET_ODL */ |
Sheng-Liang Pan | c87bcf4 | 2021-01-27 15:54:04 +0800 | [diff] [blame^] | 31 | PAD_CFG_GPI_GPIO_DRIVER(GPP_B3, NONE, PLTRST), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 32 | /* B5 : ISH_I2C0_CVF_SDA */ |
| 33 | PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), |
| 34 | /* B6 : ISH_I2C0_CVF_SCL */ |
| 35 | PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), |
| 36 | /* B7 : ISH_12C1_SDA ==> ISH_I2C0_SENSOR_SDA */ |
| 37 | PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), |
| 38 | /* B8 : ISH_I2C1_SCL ==> ISH_I2C0_SENSOR_SCL */ |
| 39 | PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), |
| 40 | /* B9 : I2C5_SDA ==> PCH_I2C5_TRACKPAD_SDA */ |
| 41 | PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), |
| 42 | /* B10 : I2C5_SCL ==> PCH_I2C5_TRACKPAD_SCL */ |
| 43 | PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), |
| 44 | /* B18 : GSPI0_MOSI ==> PCH_GSPI0_H1_TPM_MOSI_STRAP */ |
| 45 | PAD_CFG_NF(GPP_B18, DN_20K, DEEP, NF1), |
| 46 | /* B19 : GSPI1_CS0# ==> PCH_GSPI1_FPMCU_CS_L */ |
| 47 | PAD_CFG_NF(GPP_B19, NONE, DEEP, NF1), |
| 48 | /* B20 : GSPI1_CLK ==> PCH_GSPI1_FPMCU_CLK */ |
| 49 | PAD_CFG_NF(GPP_B20, NONE, DEEP, NF1), |
| 50 | /* B21 : GSPI1_MISO ==> PCH_GSPI1_FPMCU_MISO */ |
| 51 | PAD_CFG_NF(GPP_B21, NONE, DEEP, NF1), |
| 52 | /* B23 : SML1ALERT# ==> GPP_B23_STRAP # */ |
| 53 | PAD_NC(GPP_B23, DN_20K), |
| 54 | |
| 55 | /* C0 : SMBCLK ==> EN_PP3300_WLAN */ |
| 56 | PAD_CFG_GPO(GPP_C0, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 57 | /* C2 : SMBALERT# ==> GPP_C2_STRAP */ |
| 58 | PAD_NC(GPP_C2, DN_20K), |
| 59 | /* C3 : SML0CLK ==> USB4_SMB_SCL */ |
| 60 | PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), |
| 61 | /* C4 : SML0DATA ==> USB4_SMB_SDA */ |
| 62 | PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 63 | /* C5 : SML0ALERT# ==> GPP_C5_BOOT_STRAP0 */ |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 64 | PAD_NC(GPP_C5, DN_20K), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 65 | /* C7 : SML1DATA ==> EN_PP5000_PEN */ |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 66 | PAD_CFG_GPO(GPP_C7, 1, DEEP), |
| 67 | /* C10 : UART0_RTS# ==> USI_RST_L */ |
| 68 | PAD_CFG_GPO(GPP_C10, 1, DEEP), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 69 | /* C13 : UART1_TXD ==> EN_PP5000_TRACKPAD */ |
| 70 | PAD_CFG_GPO(GPP_C13, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 71 | /* C16 : I2C0_SDA ==> PCH_I2C0_1V8_AUDIO_SDA */ |
| 72 | PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), |
| 73 | /* C17 : I2C0_SCL ==> PCH_I2C0_1V8_AUDIO_SCL */ |
| 74 | PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), |
| 75 | /* C18 : I2C1_SDA ==> PCH_I2C1_TOUCH_USI_SDA */ |
| 76 | PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), |
| 77 | /* C19 : I2C1_SCL ==> PCH_I2C1_TOUCH_USI_SCL */ |
| 78 | PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), |
| 79 | /* C20 : UART2_RXD ==> FPMCU_INT_L */ |
| 80 | PAD_CFG_GPI_INT(GPP_C20, NONE, PLTRST, LEVEL), |
| 81 | /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ |
| 82 | PAD_CFG_GPO(GPP_C22, 0, DEEP), |
| 83 | /* C23 : UART2_CTS# ==> FPMCU_RST_ODL */ |
| 84 | PAD_CFG_GPO(GPP_C23, 1, DEEP), |
| 85 | |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 86 | /* D0 : ISH_GP0 ==> ISH_IMU_INT_L */ |
| 87 | PAD_CFG_GPI(GPP_D0, NONE, DEEP), |
| 88 | /* D1 : ISH_GP1 ==> ISH_ACCEL_INT_L */ |
| 89 | PAD_CFG_GPI(GPP_D1, NONE, DEEP), |
| 90 | /* D2 : ISH_GP2 ==> ISH_LID_OPEN */ |
| 91 | PAD_CFG_GPI(GPP_D2, NONE, DEEP), |
| 92 | /* D3 : ISH_GP3 ==> ISH_ALS_RGB_INT_L */ |
| 93 | PAD_CFG_GPI(GPP_D3, NONE, DEEP), |
| 94 | /* D4 : IMGCLKOUT0 ==> FCAM_RST_L */ |
| 95 | PAD_CFG_GPO(GPP_D4, 0, PLTRST), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 96 | /* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */ |
| 97 | PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), |
| 98 | /* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */ |
| 99 | PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), |
| 100 | /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ |
| 101 | PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), |
| 102 | /* D9 : ISH_SPI_CS# ==> PCH_GSPI2_CVF_CS_L */ |
| 103 | PAD_CFG_NF(GPP_D9, NONE, DEEP, NF7), |
| 104 | /* D10 : ISH_SPI_CLK ==> PCH_GSPI2_CVF_CLK_STRAP */ |
| 105 | PAD_CFG_NF(GPP_D10, DN_20K, DEEP, NF7), |
| 106 | /* D11 : ISH_SPI_MISO ==> PCH_GSPI2_CVF_MISO */ |
| 107 | PAD_CFG_NF(GPP_D11, NONE, DEEP, NF7), |
| 108 | /* D12 : ISH_SPI_MOSI ==> PCH_GSPI2_CVF_MISO_STRAP */ |
| 109 | PAD_CFG_NF(GPP_D12, DN_20K, DEEP, NF7), |
| 110 | /* D13 : ISH_UART0_RXD ==> UART_ISH_RX_DEBUG_TX */ |
| 111 | PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1), |
| 112 | /* D14 : ISH_UART0_TXD ==> UART_ISH_TX_DEBUG_RX */ |
| 113 | PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1), |
| 114 | /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ |
| 115 | PAD_CFG_GPO(GPP_D16, 1, DEEP), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 116 | /* D17 : ISH_GP4 ==> EN_FCAM_PWR */ |
Sheng-Liang Pan | e836d11 | 2020-10-21 17:22:25 +0800 | [diff] [blame] | 117 | PAD_CFG_GPO(GPP_D17, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 118 | |
| 119 | /* E1 : SPI1_IO2 ==> PEN_DET_ODL */ |
Sheng-Liang Pan | c87bcf4 | 2021-01-27 15:54:04 +0800 | [diff] [blame^] | 120 | PAD_CFG_GPI_SCI(GPP_E1, NONE, DEEP, EDGE_SINGLE, NONE), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 121 | /* E2 : SPI1_IO3 ==> WLAN_PCIE_WAKE_ODL */ |
| 122 | PAD_CFG_GPI(GPP_E2, NONE, DEEP), |
| 123 | /* E3 : CPU_GP0 ==> USI_REPORT_EN */ |
| 124 | PAD_CFG_GPO(GPP_E3, 1, DEEP), |
| 125 | /* E7 : CPU_GP1 ==> USI_INT */ |
David Wu | 053b972 | 2020-07-30 13:18:05 +0800 | [diff] [blame] | 126 | PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST, LEVEL, NONE), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 127 | /* E8 : SPI1_CS1# ==> SLP_S0IX */ |
| 128 | PAD_CFG_GPO(GPP_E8, 0, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 129 | /* E11 : SPI1_CLK ==> SD_PE_WAKE_ODL */ |
| 130 | PAD_CFG_GPI(GPP_E11, NONE, DEEP), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 131 | /* E12 : SPI1_MISO_IO1 ==> PEN_OC_ODL */ |
| 132 | PAD_CFG_GPI(GPP_E12, NONE, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 133 | /* E15 : ISH_GP6 ==> TRACKPAD_INT_ODL */ |
| 134 | PAD_CFG_GPI_APIC(GPP_E15, NONE, PLTRST, LEVEL, INVERT), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 135 | /* E16 : ISH_GP7 ==> WWAN_SIM1_DET_OD */ |
| 136 | PAD_CFG_GPI(GPP_E16, NONE, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 137 | /* E17 : THC0_SPI1_INT# ==> WWAN_PERST_L */ |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 138 | PAD_CFG_GPO(GPP_E17, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 139 | /* E19 : DDP1_CTRLDATA ==> USB0_C0_LSX_SOC_RX_STRAP */ |
| 140 | PAD_CFG_NF(GPP_E19, DN_20K, DEEP, NF4), |
| 141 | |
| 142 | /* F6 : CNV_PA_BLANKING ==> WWAN_WLAN_COEX3 */ |
| 143 | PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), |
| 144 | /* F7 : GPPF7_STRAP */ |
| 145 | PAD_NC(GPP_F7, DN_20K), |
| 146 | /* F8 : I2S_MCLK2_INOUT ==> HP_INT_L */ |
| 147 | PAD_CFG_GPI_INT(GPP_F8, NONE, PLTRST, EDGE_BOTH), |
| 148 | /* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */ |
| 149 | PAD_CFG_GPO(GPP_F11, 1, DEEP), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 150 | /* F12 : GSXDOUT ==> WWAN_RST_ODL */ |
| 151 | PAD_CFG_GPI(GPP_F12, NONE, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 152 | /* F13 : GSXDOUT ==> WiFi_DISABLE_L */ |
| 153 | PAD_CFG_GPO(GPP_F13, 1, DEEP), |
| 154 | /* F14 : GSXDIN ==> SAR0_INT_L */ |
| 155 | PAD_CFG_GPI_SCI_LOW(GPP_F14, NONE, PLTRST, EDGE_SINGLE), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 156 | /* F16 : GSXCLK ==> WWAN_DPR_SAR_ODL */ |
| 157 | PAD_CFG_GPO(GPP_F16, 1, DEEP), |
| 158 | /* F17 : WWAN_RF_DISABLE_ODL */ |
| 159 | PAD_CFG_GPO(GPP_F17, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 160 | /* F18 : THC1_SPI2_INT# ==> WWAN_PCIE_WAKE_ODL */ |
| 161 | PAD_CFG_GPI_SCI_LOW(GPP_F18, NONE, DEEP, EDGE_SINGLE), |
| 162 | /* F19 : SRCCLKREQ6# ==> WLAN_INT_L */ |
| 163 | PAD_CFG_GPI_SCI_LOW(GPP_F19, NONE, DEEP, EDGE_SINGLE), |
| 164 | |
| 165 | /* H0 : GPPH0_BOOT_STRAP1 */ |
| 166 | PAD_NC(GPP_H0, DN_20K), |
| 167 | /* H1 : GPPH1_BOOT_STRAP2 */ |
| 168 | PAD_NC(GPP_H1, DN_20K), |
| 169 | /* H2 : GPPH2_BOOT_STRAP3 */ |
| 170 | PAD_NC(GPP_H2, DN_20K), |
| 171 | /* H3 : SX_EXIT_HOLDOFF# ==> SD_PERST_L */ |
| 172 | PAD_CFG_GPO(GPP_H3, 1, DEEP), |
| 173 | /* H6 : I2C3_SDA ==> PCH_I2C3_CAM_SAR1_SDA */ |
| 174 | PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), |
| 175 | /* H7 : I2C3_SCL ==> PCH_I2C3_CAM_SAR1_SCL */ |
| 176 | PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 177 | /* H8 : I2C4_SDA ==> WWAN_WLAN_COEX1 */ |
| 178 | PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2), |
| 179 | /* H9 : I2C4_SCL ==> WWAN_WLAN_COEX2 */ |
| 180 | PAD_CFG_NF(GPP_H9, NONE, DEEP, NF2), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 181 | /* H12 : M2_SKT2_CFG0 ==> WWAN_CONFIG0 */ |
| 182 | PAD_CFG_GPI(GPP_H12, NONE, DEEP), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 183 | /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */ |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 184 | PAD_CFG_GPI(GPP_H13, NONE, DEEP), |
| 185 | /* H15 : M2_SKT2_CFG3 # ==> WWAN_CONFIG3 */ |
| 186 | PAD_CFG_GPI(GPP_H15, NONE, DEEP), |
| 187 | /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */ |
| 188 | PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1), |
| 189 | /* H17 : DDPB_CTRLDATA ==> DDPB_HDMI_CTRLDATA */ |
| 190 | PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 191 | /* H19 : TIME_SYNC0 ==> USER_PRES_FP_ODL_R */ |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 192 | PAD_CFG_GPI(GPP_H19, NONE, DEEP), |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 193 | /* H20 : IMGCLKOUT1 ==> EN_MIPI_RCAM_PWR */ |
| 194 | PAD_CFG_GPO(GPP_H20, 0, DEEP), |
| 195 | /* H21 : IMGCLKOUT2 ==> CAM_MCLK1 */ |
| 196 | PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1), |
| 197 | /* H22 : IMGCLKOUT3 ==> CAM_MCLK0 */ |
| 198 | PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 199 | |
| 200 | /* R0 : HDA_BCLK ==> I2S0_HP_SCLK */ |
| 201 | PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), |
| 202 | /* R1 : HDA_SYNC ==> I2S0_HP_SFRM */ |
| 203 | PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), |
| 204 | /* R2 : HDA_SDO ==> I2S0_PCH_TX_HP_RX_STRAP */ |
| 205 | PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), |
| 206 | /* R3 : HDA_SDIO ==> I2S0_PCH_RX_HP_TX */ |
| 207 | PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), |
| 208 | /* R5 : HDA_SDI1 ==> I2S1_PCH_RX_SPKR_TX */ |
| 209 | PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2), |
| 210 | /* R6 : I2S1_TXD ==> I2S1_PCH_RX_SPKR_RX */ |
| 211 | PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), |
| 212 | /* R7 : I2S1_SFRM ==> I2S1_SPKR_SFRM */ |
| 213 | PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), |
| 214 | |
| 215 | /* S0 : SNDW0_CLK ==> SNDW0_HP_CLK */ |
| 216 | PAD_CFG_NF(GPP_S0, NONE, DEEP, NF1), |
| 217 | /* S1 : SNDW0_DATA ==> SNDW0_HP_DATA */ |
| 218 | PAD_CFG_NF(GPP_S1, NONE, DEEP, NF1), |
| 219 | /* S2 : SNDW1_CLK ==> SNDW1_SPKR_CLK */ |
| 220 | PAD_CFG_NF(GPP_S2, NONE, DEEP, NF1), |
| 221 | /* S3 : SNDW1_DATA ==> SNDW1_SPKR_DATA */ |
| 222 | PAD_CFG_NF(GPP_S3, NONE, DEEP, NF1), |
| 223 | /* S6 : SNDW3_CLK ==> DMIC_CLK0 */ |
| 224 | PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), |
| 225 | /* S7 : SNDW3_DATA ==> DMIC_DATA0 */ |
| 226 | PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), |
| 227 | |
| 228 | /* GPD9: SLP_WLAN# ==> SLP_WLAN_L */ |
| 229 | PAD_CFG_NF(GPD9, NONE, DEEP, NF1), |
David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 230 | }; |
| 231 | |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 232 | const struct pad_config *variant_override_gpio_table(size_t *num) |
David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 233 | { |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 234 | *num = ARRAY_SIZE(override_gpio_table); |
| 235 | return override_gpio_table; |
David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | /* Early pad configuration in bootblock */ |
| 239 | static const struct pad_config early_gpio_table[] = { |
Michael Niewöhner | cf2f700 | 2020-12-21 03:46:58 +0100 | [diff] [blame] | 240 | /* C8 : UART0 RX */ |
| 241 | PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), |
| 242 | /* C9 : UART0 TX */ |
| 243 | PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), |
| 244 | |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 245 | /* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */ |
| 246 | PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), |
Alex Levin | ecf06e5 | 2020-12-09 15:37:47 -0800 | [diff] [blame] | 247 | /* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */ |
| 248 | /* assert reset on reboot */ |
| 249 | PAD_CFG_GPO(GPP_A13, 0, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 250 | /* A17 : DDSP_HPDC ==> MEM_CH_SEL */ |
| 251 | PAD_CFG_GPI(GPP_A17, NONE, DEEP), |
David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 252 | |
Sheng-Liang Pan | 7626e4b | 2020-09-08 19:23:58 +0800 | [diff] [blame] | 253 | /* B2 : VRALERT# ==> EN_PP3300_SSD */ |
| 254 | PAD_CFG_GPO(GPP_B2, 1, DEEP), |
David Wu | 7c040ad | 2020-06-23 20:33:46 +0800 | [diff] [blame] | 255 | /* B11 : PMCALERT# ==> PCH_WP_OD */ |
| 256 | PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP), |
| 257 | /* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */ |
| 258 | PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), |
| 259 | /* B16 : GSPI0_CLK ==> PCH_GSPI0_H1_TPM_CLK */ |
| 260 | PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), |
| 261 | /* B17 : GSPI0_MISO ==> PCH_GSPIO_H1_TPM_MISO */ |
| 262 | PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), |
| 263 | /* B18 : GSPI0_MOSI ==> PCH_GSPI0_H1_TPM_MOSI_STRAP */ |
| 264 | PAD_CFG_NF(GPP_B18, DN_20K, DEEP, NF1), |
| 265 | |
| 266 | /* C0 : SMBCLK ==> EN_PP3300_WLAN */ |
| 267 | PAD_CFG_GPO(GPP_C0, 1, DEEP), |
| 268 | /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ |
| 269 | PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), |
| 270 | /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ |
| 271 | PAD_CFG_GPO(GPP_C22, 0, DEEP), |
| 272 | |
Caveh Jalali | 028e527 | 2020-07-31 04:30:24 -0700 | [diff] [blame] | 273 | /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ |
| 274 | PAD_CFG_GPO(GPP_D16, 1, DEEP), |
David Wu | fba0ad8 | 2020-06-01 19:45:54 +0800 | [diff] [blame] | 275 | }; |
| 276 | |
| 277 | const struct pad_config *variant_early_gpio_table(size_t *num) |
| 278 | { |
| 279 | *num = ARRAY_SIZE(early_gpio_table); |
| 280 | return early_gpio_table; |
| 281 | } |